Simulation Results: alert_handler

 
09/06/2026 15:30:25 DVSim: v1.49.9 sha: 76f732e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 90.77 %
  • code
  • 93.33 %
  • assert
  • 98.33 %
  • func
  • 80.66 %
  • line
  • 99.70 %
  • branch
  • 97.82 %
  • cond
  • 91.06 %
  • toggle
  • 94.19 %
  • FSM
  • 83.87 %
Validation stages
V1
100.00%
V2
94.74%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
alert_handler_smoke 3.990s 172.977us 1 1 100.00
csr_hw_reset 1 1 100.00
alert_handler_csr_hw_reset 6.480s 498.830us 1 1 100.00
csr_rw 1 1 100.00
alert_handler_csr_rw 2.830s 162.648us 1 1 100.00
csr_bit_bash 1 1 100.00
alert_handler_csr_bit_bash 343.940s 44897.186us 1 1 100.00
csr_aliasing 1 1 100.00
alert_handler_csr_aliasing 169.660s 4362.669us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
alert_handler_csr_mem_rw_with_rand_reset 5.640s 124.243us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
alert_handler_csr_rw 2.830s 162.648us 1 1 100.00
alert_handler_csr_aliasing 169.660s 4362.669us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
esc_accum 1 1 100.00
alert_handler_esc_alert_accum 20.930s 1315.679us 1 1 100.00
esc_timeout 1 1 100.00
alert_handler_esc_intr_timeout 4.900s 41.608us 1 1 100.00
entropy 1 1 100.00
alert_handler_entropy 389.600s 7261.593us 1 1 100.00
sig_int_fail 1 1 100.00
alert_handler_sig_int_fail 23.890s 8688.876us 1 1 100.00
clk_skew 1 1 100.00
alert_handler_smoke 3.990s 172.977us 1 1 100.00
random_alerts 1 1 100.00
alert_handler_random_alerts 10.020s 172.298us 1 1 100.00
random_classes 1 1 100.00
alert_handler_random_classes 27.670s 1941.933us 1 1 100.00
ping_timeout 0 1 0.00
alert_handler_ping_timeout 64.770s 5122.164us 0 1 0.00
lpg 2 2 100.00
alert_handler_lpg 925.550s 77313.050us 1 1 100.00
alert_handler_lpg_stub_clk 1052.220s 115060.244us 1 1 100.00
stress_all 1 1 100.00
alert_handler_stress_all 2119.780s 221362.696us 1 1 100.00
alert_handler_entropy_stress_test 1 1 100.00
alert_handler_entropy_stress 4.000s 911.781us 1 1 100.00
alert_handler_alert_accum_saturation 1 1 100.00
alert_handler_alert_accum_saturation 2.650s 307.620us 1 1 100.00
intr_test 1 1 100.00
alert_handler_intr_test 1.880s 14.281us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
alert_handler_tl_errors 11.390s 418.953us 1 1 100.00
tl_d_illegal_access 1 1 100.00
alert_handler_tl_errors 11.390s 418.953us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
alert_handler_csr_hw_reset 6.480s 498.830us 1 1 100.00
alert_handler_csr_rw 2.830s 162.648us 1 1 100.00
alert_handler_csr_aliasing 169.660s 4362.669us 1 1 100.00
alert_handler_same_csr_outstanding 12.920s 1324.042us 1 1 100.00
tl_d_partial_access 4 4 100.00
alert_handler_csr_hw_reset 6.480s 498.830us 1 1 100.00
alert_handler_csr_rw 2.830s 162.648us 1 1 100.00
alert_handler_csr_aliasing 169.660s 4362.669us 1 1 100.00
alert_handler_same_csr_outstanding 12.920s 1324.042us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
alert_handler_shadow_reg_errors 54.400s 840.034us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
alert_handler_shadow_reg_errors 54.400s 840.034us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
alert_handler_shadow_reg_errors 54.400s 840.034us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
alert_handler_shadow_reg_errors 54.400s 840.034us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
alert_handler_shadow_reg_errors_with_csr_rw 161.940s 5237.993us 1 1 100.00
tl_intg_err 2 2 100.00
alert_handler_sec_cm 12.660s 2338.282us 1 1 100.00
alert_handler_tl_intg_err 3.540s 527.226us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
alert_handler_tl_intg_err 3.540s 527.226us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
alert_handler_shadow_reg_errors 54.400s 840.034us 1 1 100.00
sec_cm_ping_timer_config_regwen 1 1 100.00
alert_handler_smoke 3.990s 172.977us 1 1 100.00
sec_cm_alert_config_regwen 1 1 100.00
alert_handler_smoke 3.990s 172.977us 1 1 100.00
sec_cm_alert_loc_config_regwen 1 1 100.00
alert_handler_smoke 3.990s 172.977us 1 1 100.00
sec_cm_class_config_regwen 1 1 100.00
alert_handler_smoke 3.990s 172.977us 1 1 100.00
sec_cm_alert_intersig_diff 1 1 100.00
alert_handler_sig_int_fail 23.890s 8688.876us 1 1 100.00
sec_cm_lpg_intersig_mubi 1 1 100.00
alert_handler_lpg 925.550s 77313.050us 1 1 100.00
sec_cm_esc_intersig_diff 1 1 100.00
alert_handler_sig_int_fail 23.890s 8688.876us 1 1 100.00
sec_cm_alert_rx_intersig_bkgn_chk 1 1 100.00
alert_handler_entropy 389.600s 7261.593us 1 1 100.00
sec_cm_esc_tx_intersig_bkgn_chk 1 1 100.00
alert_handler_entropy 389.600s 7261.593us 1 1 100.00
sec_cm_esc_timer_fsm_sparse 1 1 100.00
alert_handler_sec_cm 12.660s 2338.282us 1 1 100.00
sec_cm_ping_timer_fsm_sparse 1 1 100.00
alert_handler_sec_cm 12.660s 2338.282us 1 1 100.00
sec_cm_esc_timer_fsm_local_esc 1 1 100.00
alert_handler_sec_cm 12.660s 2338.282us 1 1 100.00
sec_cm_ping_timer_fsm_local_esc 1 1 100.00
alert_handler_sec_cm 12.660s 2338.282us 1 1 100.00
sec_cm_esc_timer_fsm_global_esc 1 1 100.00
alert_handler_sec_cm 12.660s 2338.282us 1 1 100.00
sec_cm_accu_ctr_redun 1 1 100.00
alert_handler_sec_cm 12.660s 2338.282us 1 1 100.00
sec_cm_esc_timer_ctr_redun 1 1 100.00
alert_handler_sec_cm 12.660s 2338.282us 1 1 100.00
sec_cm_ping_timer_ctr_redun 1 1 100.00
alert_handler_sec_cm 12.660s 2338.282us 1 1 100.00
sec_cm_ping_timer_lfsr_redun 1 1 100.00
alert_handler_sec_cm 12.660s 2338.282us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
alert_handler_stress_all_with_rand_reset 203.520s 3569.471us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state 1 test run
alert_handler_ping_timeout 96121309240396924189368984467410347799439891503097072355850286732213130402235 94
UVM_INFO @ 5122163885 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---