Simulation Results: gpio

 
15/06/2026 15:30:27 DVSim: v1.49.9 sha: 058efa9 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.55 %
  • code
  • 96.91 %
  • assert
  • 98.73 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 97.84 %
  • toggle
  • 90.24 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.130s 180.593us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.240s 93.882us 1 1 100.00
gpio_smoke_en_cdc_prim 1.760s 99.259us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.170s 272.811us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.810s 145.981us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.650s 34.510us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 2.810s 378.700us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.930s 281.838us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 1.020s 103.363us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.650s 34.510us 1 1 100.00
gpio_csr_aliasing 0.930s 281.838us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 1.000s 66.172us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 0.970s 396.979us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.930s 33.051us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 0.790s 56.501us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 1.330s 303.730us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 1.320s 36.945us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 18.960s 1030.348us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 1.260s 204.440us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 0.920s 78.790us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 9.940s 2527.358us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.680s 12.687us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.710s 33.852us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 0.980s 24.294us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 0.980s 24.294us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.650s 34.510us 1 1 100.00
gpio_same_csr_outstanding 0.810s 137.797us 1 1 100.00
gpio_csr_aliasing 0.930s 281.838us 1 1 100.00
gpio_csr_hw_reset 0.810s 145.981us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.650s 34.510us 1 1 100.00
gpio_same_csr_outstanding 0.810s 137.797us 1 1 100.00
gpio_csr_aliasing 0.930s 281.838us 1 1 100.00
gpio_csr_hw_reset 0.810s 145.981us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.580s 123.784us 1 1 100.00
gpio_sec_cm 0.790s 307.287us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.580s 123.784us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.610s 42.061us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 0.660s 11.685us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
gpio_stress_all 42477286536763529940261022372946878763200878701864833722695492027504613365099 502
UVM_INFO @ 2527358298 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 10609546417092491094810376705265088142776707195900815936862414795448721299279 80
UVM_INFO @ 11684517 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---