| V1 |
|
100.00% |
| V2 |
|
72.41% |
| V2S |
|
87.50% |
| V3 |
|
100.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| kmac_smoke | 41.070s | 17925.454us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| kmac_csr_hw_reset | 1.090s | 14.604us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| kmac_csr_rw | 1.020s | 79.171us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| kmac_csr_bit_bash | 15.920s | 8145.715us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| kmac_csr_aliasing | 7.610s | 2677.247us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| kmac_csr_mem_rw_with_rand_reset | 1.780s | 180.110us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| kmac_csr_rw | 1.020s | 79.171us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 7.610s | 2677.247us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| kmac_mem_walk | 0.970s | 12.971us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| kmac_mem_partial_access | 1.230s | 59.179us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| long_msg_and_output | 1 | 1 | 100.00 | |||
| kmac_long_msg_and_output | 756.300s | 14769.489us | 1 | 1 | 100.00 | |
| burst_write | 1 | 1 | 100.00 | |||
| kmac_burst_write | 475.600s | 46532.524us | 1 | 1 | 100.00 | |
| test_vectors | 8 | 8 | 100.00 | |||
| kmac_test_vectors_sha3_224 | 2222.180s | 229094.535us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_256 | 22.790s | 826.636us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_384 | 931.050s | 245125.392us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_512 | 15.210s | 2312.615us | 1 | 1 | 100.00 | |
| kmac_test_vectors_shake_128 | 110.870s | 13700.845us | 1 | 1 | 100.00 | |
| kmac_test_vectors_shake_256 | 79.390s | 9606.603us | 1 | 1 | 100.00 | |
| kmac_test_vectors_kmac | 1.860s | 39.029us | 1 | 1 | 100.00 | |
| kmac_test_vectors_kmac_xof | 2.410s | 119.058us | 1 | 1 | 100.00 | |
| sideload | 1 | 1 | 100.00 | |||
| kmac_sideload | 380.670s | 146730.837us | 1 | 1 | 100.00 | |
| app | 0 | 1 | 0.00 | |||
| kmac_app | 6.860s | 168.797us | 0 | 1 | 0.00 | |
| app_with_partial_data | 0 | 1 | 0.00 | |||
| kmac_app_with_partial_data | 16.750s | 2216.057us | 0 | 1 | 0.00 | |
| entropy_refresh | 0 | 1 | 0.00 | |||
| kmac_entropy_refresh | 0.900s | 2.806us | 0 | 1 | 0.00 | |
| error | 0 | 1 | 0.00 | |||
| kmac_error | 9.340s | 1229.902us | 0 | 1 | 0.00 | |
| key_error | 0 | 1 | 0.00 | |||
| kmac_key_error | 1.180s | 75.537us | 0 | 1 | 0.00 | |
| sideload_invalid | 0 | 1 | 0.00 | |||
| kmac_sideload_invalid | 0.870s | 13.382us | 0 | 1 | 0.00 | |
| edn_timeout_error | 1 | 1 | 100.00 | |||
| kmac_edn_timeout_error | 13.490s | 3450.375us | 1 | 1 | 100.00 | |
| entropy_mode_error | 1 | 1 | 100.00 | |||
| kmac_entropy_mode_error | 28.900s | 3977.712us | 1 | 1 | 100.00 | |
| entropy_ready_error | 0 | 1 | 0.00 | |||
| kmac_entropy_ready_error | 0.900s | 100.046us | 0 | 1 | 0.00 | |
| lc_escalation | 1 | 1 | 100.00 | |||
| kmac_lc_escalation | 1.290s | 28.175us | 1 | 1 | 100.00 | |
| stress_all | 0 | 1 | 0.00 | |||
| kmac_stress_all | 0.820s | 116.484us | 0 | 1 | 0.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| kmac_intr_test | 0.910s | 16.634us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| kmac_alert_test | 0.990s | 33.911us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 2.230s | 111.389us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 2.230s | 111.389us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 1.090s | 14.604us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 1.020s | 79.171us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 7.610s | 2677.247us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 1.580s | 27.684us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 1.090s | 14.604us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 1.020s | 79.171us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 7.610s | 2677.247us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 1.580s | 27.684us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.610s | 55.011us | 1 | 1 | 100.00 | |
| shadow_reg_read_clear_staged_value | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.610s | 55.011us | 1 | 1 | 100.00 | |
| shadow_reg_storage_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.610s | 55.011us | 1 | 1 | 100.00 | |
| shadowed_reset_glitch | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.610s | 55.011us | 1 | 1 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors_with_csr_rw | 2.660s | 477.981us | 1 | 1 | 100.00 | |
| tl_intg_err | 2 | 2 | 100.00 | |||
| kmac_sec_cm | 21.650s | 2445.768us | 1 | 1 | 100.00 | |
| kmac_tl_intg_err | 2.830s | 442.149us | 1 | 1 | 100.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| kmac_tl_intg_err | 2.830s | 442.149us | 1 | 1 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 1 | 1 | 100.00 | |||
| kmac_lc_escalation | 1.290s | 28.175us | 1 | 1 | 100.00 | |
| sec_cm_sw_key_key_masking | 1 | 1 | 100.00 | |||
| kmac_smoke | 41.070s | 17925.454us | 1 | 1 | 100.00 | |
| sec_cm_key_sideload | 1 | 1 | 100.00 | |||
| kmac_sideload | 380.670s | 146730.837us | 1 | 1 | 100.00 | |
| sec_cm_cfg_shadowed_config_shadow | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.610s | 55.011us | 1 | 1 | 100.00 | |
| sec_cm_fsm_sparse | 1 | 1 | 100.00 | |||
| kmac_sec_cm | 21.650s | 2445.768us | 1 | 1 | 100.00 | |
| sec_cm_ctr_redun | 1 | 1 | 100.00 | |||
| kmac_sec_cm | 21.650s | 2445.768us | 1 | 1 | 100.00 | |
| sec_cm_packer_ctr_redun | 1 | 1 | 100.00 | |||
| kmac_sec_cm | 21.650s | 2445.768us | 1 | 1 | 100.00 | |
| sec_cm_cfg_shadowed_config_regwen | 1 | 1 | 100.00 | |||
| kmac_smoke | 41.070s | 17925.454us | 1 | 1 | 100.00 | |
| sec_cm_fsm_global_esc | 1 | 1 | 100.00 | |||
| kmac_lc_escalation | 1.290s | 28.175us | 1 | 1 | 100.00 | |
| sec_cm_fsm_local_esc | 1 | 1 | 100.00 | |||
| kmac_sec_cm | 21.650s | 2445.768us | 1 | 1 | 100.00 | |
| sec_cm_absorbed_ctrl_mubi | 0 | 1 | 0.00 | |||
| kmac_mubi | 1.680s | 868.652us | 0 | 1 | 0.00 | |
| sec_cm_sw_cmd_ctrl_sparse | 1 | 1 | 100.00 | |||
| kmac_smoke | 41.070s | 17925.454us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 1 | 1 | 100.00 | |||
| kmac_stress_all_with_rand_reset | 156.430s | 50585.149us | 1 | 1 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] | 7 test runs | |||
| kmac_sideload_invalid | 91268202516053493774969278110292422495524586399429111833539465443832384391334 | 76 |
UVM_INFO @ 13382143 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_app | 74440562053813909833112682991007089743118151276312620343655524496649232823619 | 81 |
UVM_INFO @ 168796617 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_app_with_partial_data | 61426398618530527203039909847942996721346163084647319597651391750378541516991 | 85 |
UVM_INFO @ 2216057286 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_entropy_refresh | 77001545251536737933808781111794589055587305040384575236802916170474202580562 | 77 |
UVM_INFO @ 2805801 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_error | 87907625818678286026467818406903561232626635639060968843384186767360731775199 | 81 |
UVM_INFO @ 1229901880 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_entropy_ready_error | 1664775520581285139959760986403482675323675506254779867303347500381769826193 | 77 |
UVM_INFO @ 100045545 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_stress_all | 19035037293454262233846116596633243427035164031843554163399200514287963822382 | 79 |
UVM_INFO @ 116484098 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) | 1 test run | |||
| kmac_mubi | 18214140194392970140227138162963056503016072052012716162804027770110628900954 | 78 |
UVM_INFO @ 868651952 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' | 1 test run | |||
| kmac_key_error | 9237488708155257037952235308516134654128418806461776483511336175716776338218 | 78 |
UVM_ERROR @ 75537122 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 75537122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|