Simulation Results: kmac/unmasked

 
16/06/2026 15:30:34 DVSim: v1.49.9 sha: 13a8919 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.00 %
  • code
  • 67.14 %
  • assert
  • 97.08 %
  • func
  • 75.77 %
  • line
  • 93.85 %
  • branch
  • 88.31 %
  • cond
  • 84.27 %
  • toggle
  • 27.66 %
  • FSM
  • 41.61 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 20.730s 23507.977us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.310s 76.504us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.170s 32.725us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 15.060s 1549.267us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 3.960s 264.535us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.360s 97.532us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.170s 32.725us 1 1 100.00
kmac_csr_aliasing 3.960s 264.535us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.770s 23.362us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.110s 45.781us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1302.620s 346182.890us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 663.050s 34105.207us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1377.630s 27299.754us 1 1 100.00
kmac_test_vectors_sha3_256 24.490s 804.465us 1 1 100.00
kmac_test_vectors_sha3_384 26.680s 16154.207us 1 1 100.00
kmac_test_vectors_sha3_512 11.060s 1463.487us 1 1 100.00
kmac_test_vectors_shake_128 111.120s 6295.023us 1 1 100.00
kmac_test_vectors_shake_256 104.690s 34692.374us 1 1 100.00
kmac_test_vectors_kmac 2.150s 503.385us 1 1 100.00
kmac_test_vectors_kmac_xof 2.750s 120.901us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 242.090s 5911.357us 1 1 100.00
app 0 1 0.00
kmac_app 2.730s 763.208us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 8.770s 1995.510us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 7.860s 1757.592us 0 1 0.00
error 0 1 0.00
kmac_error 41.180s 3400.203us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.010s 157.435us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.930s 7.819us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 22.040s 1528.716us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 3.950s 93.408us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 1.080s 222.528us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.040s 34.241us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 2.890s 185.761us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.700s 15.004us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.720s 22.359us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 1.460s 224.421us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 1.460s 224.421us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.310s 76.504us 1 1 100.00
kmac_csr_rw 1.170s 32.725us 1 1 100.00
kmac_csr_aliasing 3.960s 264.535us 1 1 100.00
kmac_same_csr_outstanding 2.440s 342.506us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.310s 76.504us 1 1 100.00
kmac_csr_rw 1.170s 32.725us 1 1 100.00
kmac_csr_aliasing 3.960s 264.535us 1 1 100.00
kmac_same_csr_outstanding 2.440s 342.506us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.530s 404.891us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.530s 404.891us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.530s 404.891us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.530s 404.891us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 4.320s 452.117us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 63.020s 28661.001us 1 1 100.00
kmac_tl_intg_err 1.950s 160.627us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 1.950s 160.627us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.040s 34.241us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 20.730s 23507.977us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 242.090s 5911.357us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.530s 404.891us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 63.020s 28661.001us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 63.020s 28661.001us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 63.020s 28661.001us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 20.730s 23507.977us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.040s 34.241us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 63.020s 28661.001us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 0.810s 57.649us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 20.730s 23507.977us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 5.660s 896.760us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 6 test runs
kmac_sideload_invalid 26607192693130798565135235195924950718851109639013999776179227546656351703075 76
UVM_INFO @ 7818828 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 101125414680136407144273768223282728027639679720752000603660237521641198096032 78
UVM_INFO @ 763208439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 39836521314205317653410798650744316581050903548195431284766352104917483365911 81
UVM_INFO @ 1995510007 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 80222192477499068821287931623396961527048816635296526113485191111068868392780 81
UVM_INFO @ 1757591573 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 31632387406542241756012276013173513972409827320341550642539579910097043254023 108
UVM_INFO @ 3400202782 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 38817614813126222502133277288204153310736535108255119596790958558274947553826 77
UVM_INFO @ 222527703 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 3 test runs
kmac_mubi 31695682154744113437358941770929345693041387513474566817684583146032180460927 77
UVM_INFO @ 57649006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 102898748195113740584466029721698310563291808439110842192469515041399465335059 80
UVM_INFO @ 185760806 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 84871087208751738311919979850251821788055264038727188993020025969187458055433 97
UVM_INFO @ 896759819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_key_error 22050210538269096099667428580460709439779017900687301809389413206435595248003 78
UVM_ERROR @ 157435498 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 157435498 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---