Simulation Results: kmac/unmasked

 
17/06/2026 15:30:26 DVSim: v1.49.9 sha: 8899f65 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.94 %
  • code
  • 67.07 %
  • assert
  • 96.50 %
  • func
  • 79.25 %
  • line
  • 93.18 %
  • branch
  • 88.23 %
  • cond
  • 85.61 %
  • toggle
  • 27.43 %
  • FSM
  • 40.88 %
Validation stages
V1
100.00%
V2
75.86%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 2.470s 725.244us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.270s 58.681us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.980s 40.148us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 6.220s 960.357us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 7.820s 3154.753us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.440s 115.008us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.980s 40.148us 1 1 100.00
kmac_csr_aliasing 7.820s 3154.753us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.840s 14.664us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.140s 71.472us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 2011.260s 91657.033us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 502.610s 9074.554us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 33.620s 2781.386us 1 1 100.00
kmac_test_vectors_sha3_256 2084.550s 390670.410us 1 1 100.00
kmac_test_vectors_sha3_384 910.660s 36768.526us 1 1 100.00
kmac_test_vectors_sha3_512 15.050s 1119.064us 1 1 100.00
kmac_test_vectors_shake_128 109.800s 3230.984us 1 1 100.00
kmac_test_vectors_shake_256 320.460s 131160.210us 1 1 100.00
kmac_test_vectors_kmac 1.750s 76.277us 1 1 100.00
kmac_test_vectors_kmac_xof 2.540s 702.394us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 226.990s 10701.328us 1 1 100.00
app 0 1 0.00
kmac_app 1.150s 59.113us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 6.890s 479.367us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 3.260s 769.883us 0 1 0.00
error 1 1 100.00
kmac_error 30.260s 7697.536us 1 1 100.00
key_error 0 1 0.00
kmac_key_error 0.800s 10.101us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.820s 1.887us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 10.700s 1560.162us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 3.520s 70.666us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 1.100s 19.049us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 5.210s 1418.736us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 2.210s 805.219us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.950s 73.595us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 1.000s 41.337us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.460s 47.541us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.460s 47.541us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.270s 58.681us 1 1 100.00
kmac_csr_rw 0.980s 40.148us 1 1 100.00
kmac_csr_aliasing 7.820s 3154.753us 1 1 100.00
kmac_same_csr_outstanding 2.150s 113.559us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.270s 58.681us 1 1 100.00
kmac_csr_rw 0.980s 40.148us 1 1 100.00
kmac_csr_aliasing 7.820s 3154.753us 1 1 100.00
kmac_same_csr_outstanding 2.150s 113.559us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.360s 70.033us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.360s 70.033us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.360s 70.033us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.360s 70.033us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 3.670s 221.828us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 55.440s 12675.098us 1 1 100.00
kmac_tl_intg_err 3.560s 157.274us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 3.560s 157.274us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 5.210s 1418.736us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 2.470s 725.244us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 226.990s 10701.328us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.360s 70.033us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 55.440s 12675.098us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 55.440s 12675.098us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 55.440s 12675.098us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 2.470s 725.244us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 5.210s 1418.736us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 55.440s 12675.098us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 7.470s 744.757us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 2.470s 725.244us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 48.710s 3070.011us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 6 test runs
kmac_app 40957716570762675214772017618967621687700106276055965950716755393442256227746 77
UVM_INFO @ 59113496 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 93470532342432928235395194424239999952225335983656860920889667374929509298465 82
UVM_INFO @ 479367168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 32287249437624408487505944499253150841666686820219503997873134026031797744571 78
UVM_INFO @ 769882533 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 41176257525208506469425055844350632454998778194003247760710790796146436732723 77
UVM_INFO @ 19048564 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 54455617579345826900490652121907759723978076448177977129349381795050450000720 85
UVM_INFO @ 805218839 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 103710510822988247775887135757888369311245090371509042822145998619294958363624 134
UVM_INFO @ 3070011062 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 2 test runs
kmac_sideload_invalid 61165806553240759380416374591888870666058117847948569029749206744325634530922 79
UVM_ERROR @ 1886809 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 1886809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_key_error 67403112835049611855976771193059999318889084768713724344777684067513938655218 78
UVM_ERROR @ 10100891 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 10100891 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 1 test run
kmac_mubi 105498556816226473655963510094108920997662721144222513651210022304128284173175 81
UVM_INFO @ 744756789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---