Simulation Results: keymgr

 
18/06/2026 15:30:44 DVSim: v1.49.9 sha: a114efe json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.35 %
  • code
  • 94.80 %
  • assert
  • 97.49 %
  • func
  • 66.75 %
  • line
  • 98.80 %
  • branch
  • 97.90 %
  • cond
  • 94.40 %
  • toggle
  • 96.85 %
  • FSM
  • 86.05 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 2.560s 247.505us 1 1 100.00
random 1 1 100.00
keymgr_random 4.150s 245.054us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 1.280s 39.410us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.860s 13.935us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 12.410s 384.133us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 7.700s 477.993us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.020s 115.427us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.860s 13.935us 1 1 100.00
keymgr_csr_aliasing 7.700s 477.993us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 8.070s 950.831us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 2.960s 390.570us 1 1 100.00
keymgr_sideload_kmac 5.100s 926.253us 1 1 100.00
keymgr_sideload_aes 4.180s 503.595us 1 1 100.00
keymgr_sideload_otbn 4.300s 1109.856us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 3.120s 457.740us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 5.450s 663.983us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 2.130s 382.467us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 4.810s 437.033us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 3.490s 201.067us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 3.330s 146.267us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 15.820s 655.360us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 1.070s 14.540us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 1.140s 22.019us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 2.050s 283.338us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 2.050s 283.338us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 1.280s 39.410us 1 1 100.00
keymgr_csr_rw 0.860s 13.935us 1 1 100.00
keymgr_csr_aliasing 7.700s 477.993us 1 1 100.00
keymgr_same_csr_outstanding 1.510s 24.252us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 1.280s 39.410us 1 1 100.00
keymgr_csr_rw 0.860s 13.935us 1 1 100.00
keymgr_csr_aliasing 7.700s 477.993us 1 1 100.00
keymgr_same_csr_outstanding 1.510s 24.252us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 14.510s 5329.854us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 14.510s 5329.854us 1 1 100.00
keymgr_tl_intg_err 3.230s 791.701us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 1.900s 361.830us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 1.900s 361.830us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 1.900s 361.830us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 1.900s 361.830us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 9.040s 597.286us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 14.510s 5329.854us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 14.510s 5329.854us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 3.230s 791.701us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 1.900s 361.830us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 8.070s 950.831us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 4.150s 245.054us 1 1 100.00
keymgr_csr_rw 0.860s 13.935us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 4.150s 245.054us 1 1 100.00
keymgr_csr_rw 0.860s 13.935us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 4.150s 245.054us 1 1 100.00
keymgr_csr_rw 0.860s 13.935us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 5.450s 663.983us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.490s 201.067us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.490s 201.067us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 4.150s 245.054us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 3.020s 603.686us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 14.510s 5329.854us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 14.510s 5329.854us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 14.510s 5329.854us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 1.730s 50.619us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 5.450s 663.983us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 14.510s 5329.854us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 14.510s 5329.854us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 14.510s 5329.854us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.730s 50.619us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.730s 50.619us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 14.510s 5329.854us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.730s 50.619us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 14.510s 5329.854us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 1.730s 50.619us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 8.340s 341.508us 1 1 100.00