Simulation Results: kmac/masked

 
18/06/2026 15:30:44 DVSim: v1.49.9 sha: a114efe json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 81.70 %
  • code
  • 69.48 %
  • assert
  • 98.31 %
  • func
  • 77.32 %
  • line
  • 96.22 %
  • branch
  • 90.12 %
  • cond
  • 85.27 %
  • toggle
  • 28.94 %
  • FSM
  • 46.84 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 36.300s 5556.683us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.020s 68.177us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.840s 24.169us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 16.500s 7484.052us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 4.000s 271.675us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.420s 25.609us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.840s 24.169us 1 1 100.00
kmac_csr_aliasing 4.000s 271.675us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.720s 23.546us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.150s 35.784us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1201.680s 722705.168us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 419.240s 52065.954us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 35.030s 9892.549us 1 1 100.00
kmac_test_vectors_sha3_256 2277.130s 95413.387us 1 1 100.00
kmac_test_vectors_sha3_384 25.390s 22191.912us 1 1 100.00
kmac_test_vectors_sha3_512 1090.550s 56780.875us 1 1 100.00
kmac_test_vectors_shake_128 2995.750s 548643.039us 1 1 100.00
kmac_test_vectors_shake_256 83.450s 13862.590us 1 1 100.00
kmac_test_vectors_kmac 2.710s 290.750us 1 1 100.00
kmac_test_vectors_kmac_xof 1.890s 59.779us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 21.520s 4407.035us 1 1 100.00
app 0 1 0.00
kmac_app 1.940s 64.301us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 9.800s 962.469us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 11.030s 267.551us 0 1 0.00
error 0 1 0.00
kmac_error 29.730s 6533.414us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 0.940s 91.997us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 1.640s 101.309us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 1.070s 83.022us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 1.030s 66.069us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.920s 19.132us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.290s 70.345us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 972.840s 199643.696us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.760s 32.802us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.850s 32.987us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 1.450s 128.484us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 1.450s 128.484us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.020s 68.177us 1 1 100.00
kmac_csr_rw 0.840s 24.169us 1 1 100.00
kmac_csr_aliasing 4.000s 271.675us 1 1 100.00
kmac_same_csr_outstanding 1.490s 351.158us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.020s 68.177us 1 1 100.00
kmac_csr_rw 0.840s 24.169us 1 1 100.00
kmac_csr_aliasing 4.000s 271.675us 1 1 100.00
kmac_same_csr_outstanding 1.490s 351.158us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.080s 49.021us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.080s 49.021us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.080s 49.021us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.080s 49.021us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.380s 161.449us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 31.070s 10728.273us 1 1 100.00
kmac_tl_intg_err 1.870s 1104.886us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 1.870s 1104.886us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.290s 70.345us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 36.300s 5556.683us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 21.520s 4407.035us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.080s 49.021us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 31.070s 10728.273us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 31.070s 10728.273us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 31.070s 10728.273us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 36.300s 5556.683us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.290s 70.345us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 31.070s 10728.273us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 3.200s 655.166us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 36.300s 5556.683us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 1.710s 709.271us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 6 test runs
kmac_app 87538381817279368489310722879316944988117318044030137748838592902839182757813 78
UVM_INFO @ 64301461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 12961600739311016016382980471457358048997488113630819141682903066013743202105 82
UVM_INFO @ 962468666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 106030704056831005461609011040149747713905349487718857526961713015867094852075 83
UVM_INFO @ 267551339 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 13640758387217832826545386861248028433559940111337057232028326292706509622645 91
UVM_INFO @ 6533414268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 103732573590479555676263269985014642124563209424376108471871137316167055237158 77
UVM_INFO @ 19131914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 37613203758002910910553731046689402935165357311988057962979254219120291802178 219
UVM_INFO @ 199643695636 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 2 test runs
kmac_sideload_invalid 25478441973156081272934714268145361808043870286598489858134590970115752268811 85
UVM_ERROR @ 101309439 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 101309439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_key_error 56637418591286883054478012913976730763926384145794926960468290756381864067418 78
UVM_ERROR @ 91996949 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 91996949 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 2 test runs
kmac_mubi 4512068407882333135157211878442408802344318044269462088681779942433757339237 78
UVM_INFO @ 655166130 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 44441122598690350172501822661441069930041982967326934010093239607116748825262 94
UVM_INFO @ 709271320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---