Simulation Results: entropy_src/rng_4bits

 
22/06/2026 15:30:25 DVSim: v1.49.10 sha: c4c7114 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 76.32 %
  • code
  • 89.03 %
  • assert
  • 84.56 %
  • func
  • 55.36 %
  • block
  • 94.56 %
  • line
  • 97.21 %
  • branch
  • 86.91 %
  • toggle
  • 76.18 %
  • FSM
  • 95.83 %
Validation stages
V1
83.33%
V2
100.00%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 3.000s 109.944us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 2.000s 53.771us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 1.000s 223.242us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 6.000s 868.794us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 4.000s 217.136us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
entropy_src_csr_mem_rw_with_rand_reset 2.000s 11.322us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 1.000s 223.242us 1 1 100.00
entropy_src_csr_aliasing 4.000s 217.136us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 3 3 100.00
entropy_src_smoke 3.000s 109.944us 1 1 100.00
entropy_src_rng 200.000s 14116.737us 1 1 100.00
entropy_src_fw_ov 25.000s 13454.229us 1 1 100.00
firmware_mode 1 1 100.00
entropy_src_fw_ov 25.000s 13454.229us 1 1 100.00
rng_mode 1 1 100.00
entropy_src_rng 200.000s 14116.737us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 190.000s 14037.907us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 200.000s 14116.737us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 200.000s 14116.737us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 200.000s 14116.737us 1 1 100.00
entropy_src_intr 17.000s 2464.447us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 200.000s 14116.737us 1 1 100.00
entropy_src_functional_alerts 4.000s 171.812us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 96.000s 13780.544us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 2.000s 91.700us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 3.000s 112.694us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 2.000s 15.538us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 1.000s 27.990us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 3.000s 95.325us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 3.000s 95.325us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 53.771us 1 1 100.00
entropy_src_csr_rw 1.000s 223.242us 1 1 100.00
entropy_src_csr_aliasing 4.000s 217.136us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 339.869us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 53.771us 1 1 100.00
entropy_src_csr_rw 1.000s 223.242us 1 1 100.00
entropy_src_csr_aliasing 4.000s 217.136us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 339.869us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 2.000s 68.526us 1 1 100.00
entropy_src_tl_intg_err 2.000s 98.317us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 200.000s 14116.737us 1 1 100.00
entropy_src_cfg_regwen 1.000s 50.640us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 200.000s 14116.737us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 200.000s 14116.737us 1 1 100.00
sec_cm_intersig_mubi 2 2 100.00
entropy_src_rng 200.000s 14116.737us 1 1 100.00
entropy_src_fw_ov 25.000s 13454.229us 1 1 100.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 91.700us 1 1 100.00
entropy_src_sec_cm 2.000s 68.526us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 91.700us 1 1 100.00
entropy_src_sec_cm 2.000s 68.526us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 200.000s 14116.737us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 91.700us 1 1 100.00
entropy_src_sec_cm 2.000s 68.526us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 91.700us 1 1 100.00
entropy_src_sec_cm 2.000s 68.526us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 2.000s 91.700us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 4.000s 171.812us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 2.000s 98.317us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 42.000s 13198.639us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
entropy_src_stress_all_with_rand_reset 10.000s 496.830us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (entropy_src_scoreboard.sv:1663) scoreboard [scoreboard] invalid csr: entropy_src_reg_block.alert_test 1 test run
entropy_src_stress_all_with_rand_reset 13375009613441076553281121089787203582970141291312384101432339413405261064582 122
UVM_INFO @ 496829683 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror repcnts_total_fails 1 test run
entropy_src_csr_mem_rw_with_rand_reset 48082068654289562179338615484914032771511951333381572829557429631982207613030 113
UVM_INFO @ 11322323 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---