Simulation Results: kmac/masked

 
22/06/2026 15:30:25 DVSim: v1.49.10 sha: c4c7114 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 81.15 %
  • code
  • 68.97 %
  • assert
  • 96.48 %
  • func
  • 78.01 %
  • line
  • 95.52 %
  • branch
  • 89.44 %
  • cond
  • 85.04 %
  • toggle
  • 29.27 %
  • FSM
  • 45.57 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 4.630s 593.621us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.900s 87.684us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.990s 68.242us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 8.640s 946.594us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 3.870s 250.005us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 2.090s 87.869us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.990s 68.242us 1 1 100.00
kmac_csr_aliasing 3.870s 250.005us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.700s 19.788us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.220s 143.830us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1100.620s 194608.473us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 333.310s 11282.770us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 2747.220s 477848.319us 1 1 100.00
kmac_test_vectors_sha3_256 31.180s 2814.360us 1 1 100.00
kmac_test_vectors_sha3_384 31.150s 20311.425us 1 1 100.00
kmac_test_vectors_sha3_512 1120.190s 69551.314us 1 1 100.00
kmac_test_vectors_shake_128 2036.030s 142648.033us 1 1 100.00
kmac_test_vectors_shake_256 329.270s 27766.156us 1 1 100.00
kmac_test_vectors_kmac 3.150s 542.892us 1 1 100.00
kmac_test_vectors_kmac_xof 2.630s 997.952us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 79.030s 17518.564us 1 1 100.00
app 0 1 0.00
kmac_app 3.700s 143.075us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 1.450s 89.202us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 4.230s 313.878us 0 1 0.00
error 0 1 0.00
kmac_error 17.240s 2964.953us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 0.860s 35.113us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 1.810s 29.649us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 0.890s 38.305us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 0.840s 92.870us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 1.440s 283.259us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.400s 55.501us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 2.240s 58.848us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.910s 32.208us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.880s 29.800us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.200s 61.430us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.200s 61.430us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.900s 87.684us 1 1 100.00
kmac_csr_rw 0.990s 68.242us 1 1 100.00
kmac_csr_aliasing 3.870s 250.005us 1 1 100.00
kmac_same_csr_outstanding 1.750s 106.681us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.900s 87.684us 1 1 100.00
kmac_csr_rw 0.990s 68.242us 1 1 100.00
kmac_csr_aliasing 3.870s 250.005us 1 1 100.00
kmac_same_csr_outstanding 1.750s 106.681us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.450s 41.065us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.450s 41.065us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.450s 41.065us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.450s 41.065us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.300s 202.497us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 70.280s 27783.181us 1 1 100.00
kmac_tl_intg_err 2.470s 138.155us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.470s 138.155us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.400s 55.501us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 4.630s 593.621us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 79.030s 17518.564us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.450s 41.065us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 70.280s 27783.181us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 70.280s 27783.181us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 70.280s 27783.181us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 4.630s 593.621us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.400s 55.501us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 70.280s 27783.181us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 27.380s 1546.064us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 4.630s 593.621us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 1.700s 42.873us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 8 test runs
kmac_sideload_invalid 56249542805587550672887535630895296356073805470331423593187529298868783088767 79
UVM_INFO @ 29649164 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 91570213709681433640875335024086561352912907288919533295095703796882977595517 78
UVM_INFO @ 143074666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 41290037471976109019650716577480603001906644335546301409750578039305374265094 77
UVM_INFO @ 89201748 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 108019566799353881478891360090285037243717539444969318721731360848222914042378 79
UVM_INFO @ 313878478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 109870068153381750283118894166064693314799470557916226048368235127117631859765 87
UVM_INFO @ 2964952587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 105213867632431201654107500078889184613038277160195203992268525512441738447876 77
UVM_INFO @ 283258555 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 29141109123448094964731362945463344216716528899491907241736359698480345915228 85
UVM_INFO @ 58848367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 45905634944161331111168265381966933032782438655010980264182043636782964446236 94
UVM_INFO @ 42872784 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 1 test run
kmac_mubi 5429411238048247429792721257167089055374309624625861431209033742875574228010 89
UVM_INFO @ 1546064237 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_key_error 68131152598421020382768531223370321854330484691384436182483137115016694707512 78
UVM_ERROR @ 35112535 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 35112535 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---