| V1 |
|
100.00% |
| V2 |
|
100.00% |
| V2S |
|
100.00% |
| V3 |
|
100.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| pwm_smoke | 4.000s | 1023.398us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| pwm_csr_hw_reset | 1.000s | 57.913us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| pwm_csr_rw | 1.000s | 210.871us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| pwm_csr_bit_bash | 4.000s | 865.814us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| pwm_csr_aliasing | 2.000s | 34.803us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| pwm_csr_mem_rw_with_rand_reset | 2.000s | 25.320us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| pwm_csr_rw | 1.000s | 210.871us | 1 | 1 | 100.00 | |
| pwm_csr_aliasing | 2.000s | 34.803us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| dutycycle | 1 | 1 | 100.00 | |||
| pwm_rand_output | 33.000s | 42005.280us | 1 | 1 | 100.00 | |
| pulse | 1 | 1 | 100.00 | |||
| pwm_rand_output | 33.000s | 42005.280us | 1 | 1 | 100.00 | |
| blink | 1 | 1 | 100.00 | |||
| pwm_rand_output | 33.000s | 42005.280us | 1 | 1 | 100.00 | |
| heartbeat | 1 | 1 | 100.00 | |||
| pwm_rand_output | 33.000s | 42005.280us | 1 | 1 | 100.00 | |
| resolution | 1 | 1 | 100.00 | |||
| pwm_rand_output | 33.000s | 42005.280us | 1 | 1 | 100.00 | |
| multi_channel | 1 | 1 | 100.00 | |||
| pwm_rand_output | 33.000s | 42005.280us | 1 | 1 | 100.00 | |
| polarity | 1 | 1 | 100.00 | |||
| pwm_rand_output | 33.000s | 42005.280us | 1 | 1 | 100.00 | |
| phase | 2 | 2 | 100.00 | |||
| pwm_rand_output | 33.000s | 42005.280us | 1 | 1 | 100.00 | |
| pwm_phase | 22.000s | 42012.780us | 1 | 1 | 100.00 | |
| lowpower | 1 | 1 | 100.00 | |||
| pwm_rand_output | 33.000s | 42005.280us | 1 | 1 | 100.00 | |
| perf | 1 | 1 | 100.00 | |||
| pwm_perf | 34.000s | 75357.366us | 1 | 1 | 100.00 | |
| regwen | 1 | 1 | 100.00 | |||
| pwm_regwen | 100.000s | 10831.889us | 1 | 1 | 100.00 | |
| stress_all | 1 | 1 | 100.00 | |||
| pwm_stress_all | 90.000s | 228279.368us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| pwm_alert_test | 1.000s | 43.271us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| pwm_tl_errors | 2.000s | 118.990us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| pwm_tl_errors | 2.000s | 118.990us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| pwm_csr_hw_reset | 1.000s | 57.913us | 1 | 1 | 100.00 | |
| pwm_csr_rw | 1.000s | 210.871us | 1 | 1 | 100.00 | |
| pwm_csr_aliasing | 2.000s | 34.803us | 1 | 1 | 100.00 | |
| pwm_same_csr_outstanding | 1.000s | 64.146us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| pwm_csr_hw_reset | 1.000s | 57.913us | 1 | 1 | 100.00 | |
| pwm_csr_rw | 1.000s | 210.871us | 1 | 1 | 100.00 | |
| pwm_csr_aliasing | 2.000s | 34.803us | 1 | 1 | 100.00 | |
| pwm_same_csr_outstanding | 1.000s | 64.146us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| tl_intg_err | 2 | 2 | 100.00 | |||
| pwm_tl_intg_err | 2.000s | 171.988us | 1 | 1 | 100.00 | |
| pwm_sec_cm | 1.000s | 193.007us | 1 | 1 | 100.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| pwm_tl_intg_err | 2.000s | 171.988us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| heartbeat_wrap | 1 | 1 | 100.00 | |||
| pwm_heartbeat_wrap | 22.000s | 10831.283us | 1 | 1 | 100.00 | |