Simulation Results: keymgr

 
24/06/2026 15:30:34 DVSim: v1.49.11 sha: 18ef53a json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 88.09 %
  • code
  • 95.28 %
  • assert
  • 97.49 %
  • func
  • 71.51 %
  • line
  • 98.76 %
  • branch
  • 97.53 %
  • cond
  • 94.76 %
  • toggle
  • 96.96 %
  • FSM
  • 88.37 %
Validation stages
V1
100.00%
V2
94.74%
V2S
90.91%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 12.180s 811.568us 1 1 100.00
random 1 1 100.00
keymgr_random 4.650s 568.795us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 1.140s 43.147us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.850s 87.044us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 8.530s 1414.709us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 11.360s 8165.521us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.330s 87.994us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.850s 87.044us 1 1 100.00
keymgr_csr_aliasing 11.360s 8165.521us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 7.430s 204.603us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 36.880s 2842.381us 1 1 100.00
keymgr_sideload_kmac 1.600s 31.701us 1 1 100.00
keymgr_sideload_aes 5.560s 1472.472us 1 1 100.00
keymgr_sideload_otbn 6.800s 3943.992us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 2.770s 315.060us 1 1 100.00
lc_disable 0 1 0.00
keymgr_lc_disable 1.890s 114.126us 0 1 0.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 2.210s 54.487us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 7.110s 394.833us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 6.680s 587.169us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 2.430s 266.880us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 33.630s 2903.604us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.850s 19.899us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.830s 11.575us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 2.680s 528.520us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 2.680s 528.520us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 1.140s 43.147us 1 1 100.00
keymgr_csr_rw 0.850s 87.044us 1 1 100.00
keymgr_csr_aliasing 11.360s 8165.521us 1 1 100.00
keymgr_same_csr_outstanding 1.750s 25.794us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 1.140s 43.147us 1 1 100.00
keymgr_csr_rw 0.850s 87.044us 1 1 100.00
keymgr_csr_aliasing 11.360s 8165.521us 1 1 100.00
keymgr_same_csr_outstanding 1.750s 25.794us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 9.390s 1909.254us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 9.390s 1909.254us 1 1 100.00
keymgr_tl_intg_err 5.370s 243.755us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 1.780s 193.307us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 1.780s 193.307us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 1.780s 193.307us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 1.780s 193.307us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 8.220s 2335.709us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 9.390s 1909.254us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 9.390s 1909.254us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 5.370s 243.755us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 1.780s 193.307us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 7.430s 204.603us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 4.650s 568.795us 1 1 100.00
keymgr_csr_rw 0.850s 87.044us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 4.650s 568.795us 1 1 100.00
keymgr_csr_rw 0.850s 87.044us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 4.650s 568.795us 1 1 100.00
keymgr_csr_rw 0.850s 87.044us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 0 1 0.00
keymgr_lc_disable 1.890s 114.126us 0 1 0.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 6.680s 587.169us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 6.680s 587.169us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 4.650s 568.795us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 1.870s 40.961us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.390s 1909.254us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.390s 1909.254us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 9.390s 1909.254us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 3.750s 149.211us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 0 1 0.00
keymgr_lc_disable 1.890s 114.126us 0 1 0.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 9.390s 1909.254us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.390s 1909.254us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 9.390s 1909.254us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 3.750s 149.211us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 3.750s 149.211us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 9.390s 1909.254us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 3.750s 149.211us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.390s 1909.254us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 3.750s 149.211us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 14.990s 1068.495us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (keymgr_scoreboard.sv:766) [scoreboard] Check failed item.d_data != `gmv(csr) (* [*] vs * [*]) reg name: keymgr_reg_block.sw_share0_output_* 1 test run
keymgr_lc_disable 36777037217232980798324041603279751146099651252648785634687883726130656864346 282
UVM_INFO @ 114125957 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---