Simulation Results: gpio

 
25/06/2026 15:30:31 DVSim: v1.49.11 sha: 9b639d2 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.41 %
  • code
  • 97.13 %
  • assert
  • 98.10 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 98.56 %
  • toggle
  • 90.40 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.270s 310.177us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.420s 520.731us 1 1 100.00
gpio_smoke_en_cdc_prim 1.790s 88.259us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.370s 76.971us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.800s 70.221us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.890s 43.257us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 1.640s 98.851us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.930s 14.407us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 1.400s 23.131us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.890s 43.257us 1 1 100.00
gpio_csr_aliasing 0.930s 14.407us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 1.150s 101.481us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.190s 249.719us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 1.140s 140.473us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.240s 109.541us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 1.270s 53.787us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 2.730s 182.589us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 3.770s 748.715us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 5.180s 198.348us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 1.170s 102.500us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 1.250s 104.709us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.750s 12.399us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.890s 29.940us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 1.390s 103.167us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 1.390s 103.167us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.890s 43.257us 1 1 100.00
gpio_same_csr_outstanding 0.880s 15.160us 1 1 100.00
gpio_csr_aliasing 0.930s 14.407us 1 1 100.00
gpio_csr_hw_reset 0.800s 70.221us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.890s 43.257us 1 1 100.00
gpio_same_csr_outstanding 0.880s 15.160us 1 1 100.00
gpio_csr_aliasing 0.930s 14.407us 1 1 100.00
gpio_csr_hw_reset 0.800s 70.221us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.190s 426.546us 1 1 100.00
gpio_sec_cm 0.880s 257.216us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.190s 426.546us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.810s 45.967us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 0.870s 6.244us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
gpio_stress_all 49404319410138137621100784768398403412137512195402503782134576254346643802508 76
UVM_INFO @ 104708751 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 1 test run
gpio_stress_all_with_rand_reset 31974403851398771409708349848877361639920432433948249942305743324740335949063 78
UVM_INFO @ 6243767 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---