Simulation Results: kmac/masked

 
25/06/2026 15:30:31 DVSim: v1.49.11 sha: 9b639d2 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.76 %
  • code
  • 68.61 %
  • assert
  • 96.91 %
  • func
  • 76.76 %
  • line
  • 95.43 %
  • branch
  • 89.57 %
  • cond
  • 84.85 %
  • toggle
  • 28.90 %
  • FSM
  • 44.30 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 10.050s 1336.059us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.230s 33.115us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.020s 29.439us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 16.320s 3230.549us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 4.180s 459.857us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.740s 31.732us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.020s 29.439us 1 1 100.00
kmac_csr_aliasing 4.180s 459.857us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.790s 21.555us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.190s 73.846us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 2570.250s 35858.798us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 210.490s 39093.458us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 39.190s 13489.096us 1 1 100.00
kmac_test_vectors_sha3_256 26.720s 11521.271us 1 1 100.00
kmac_test_vectors_sha3_384 26.800s 4340.191us 1 1 100.00
kmac_test_vectors_sha3_512 16.810s 2642.998us 1 1 100.00
kmac_test_vectors_shake_128 156.500s 23272.532us 1 1 100.00
kmac_test_vectors_shake_256 2352.190s 111646.110us 1 1 100.00
kmac_test_vectors_kmac 2.210s 49.399us 1 1 100.00
kmac_test_vectors_kmac_xof 2.820s 132.212us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 72.730s 1525.256us 1 1 100.00
app 0 1 0.00
kmac_app 1.180s 70.415us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 1.850s 152.235us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 2.810s 166.429us 0 1 0.00
error 0 1 0.00
kmac_error 13.710s 318.892us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.520s 44.023us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.890s 17.449us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 6.720s 150.218us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 0.970s 29.901us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 1.110s 40.808us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.210s 44.364us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 17.070s 4910.344us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.790s 16.964us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.920s 171.474us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 1.780s 432.466us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 1.780s 432.466us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.230s 33.115us 1 1 100.00
kmac_csr_rw 1.020s 29.439us 1 1 100.00
kmac_csr_aliasing 4.180s 459.857us 1 1 100.00
kmac_same_csr_outstanding 1.250s 39.696us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.230s 33.115us 1 1 100.00
kmac_csr_rw 1.020s 29.439us 1 1 100.00
kmac_csr_aliasing 4.180s 459.857us 1 1 100.00
kmac_same_csr_outstanding 1.250s 39.696us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.710s 74.586us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.710s 74.586us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.710s 74.586us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.710s 74.586us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 4.130s 253.078us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 42.680s 9673.432us 1 1 100.00
kmac_tl_intg_err 2.030s 114.811us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.030s 114.811us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.210s 44.364us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 10.050s 1336.059us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 72.730s 1525.256us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.710s 74.586us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 42.680s 9673.432us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 42.680s 9673.432us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 42.680s 9673.432us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 10.050s 1336.059us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.210s 44.364us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 42.680s 9673.432us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 1.030s 47.465us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 10.050s 1336.059us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 1.250s 12.114us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 7 test runs
kmac_sideload_invalid 76753613058334967750781463553243234574572310785648015063936676082086623734194 76
UVM_INFO @ 17448653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 33738987443416875692999371471689787026120379719731743782058945957033089168716 77
UVM_INFO @ 70415346 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 92208484469084337365316186136949484324395120258363015977440084297798994632752 77
UVM_INFO @ 152234761 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 51846014725541369021011999846584582500666978612729281949961925477509860406656 78
UVM_INFO @ 166429173 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 110881641552847140772292165824712710958570363069609770837747436204264355727463 82
UVM_INFO @ 318891553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 57329011869888668699833462266286397841227932959510337870747505769999730544542 77
UVM_INFO @ 40807776 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 85195187298686989664126063512852020960475962185392603143885014931660339637465 94
UVM_INFO @ 12114233 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 2 test runs
kmac_mubi 83413302315563984211684939198291683183933055141034049483304809127415429284320 77
UVM_INFO @ 47464652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 108890902196580987130740317784500068478354066403488814658547109312631627195220 130
UVM_INFO @ 4910343757 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_key_error 13315847046291826349327909545776131290038836708999277608517710452773688805914 78
UVM_ERROR @ 44022697 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 44022697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---