Simulation Results: kmac/unmasked

 
25/06/2026 15:30:31 DVSim: v1.49.11 sha: 9b639d2 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.15 %
  • code
  • 67.31 %
  • assert
  • 97.52 %
  • func
  • 75.63 %
  • line
  • 93.83 %
  • branch
  • 88.20 %
  • cond
  • 85.56 %
  • toggle
  • 27.34 %
  • FSM
  • 41.61 %
Validation stages
V1
100.00%
V2
68.97%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 23.370s 6592.157us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.110s 76.893us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.070s 36.304us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 8.140s 830.992us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 4.640s 878.982us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.670s 193.908us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.070s 36.304us 1 1 100.00
kmac_csr_aliasing 4.640s 878.982us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.910s 22.483us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.000s 31.849us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1951.750s 91980.173us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 239.490s 41467.535us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 2224.070s 587298.519us 1 1 100.00
kmac_test_vectors_sha3_256 34.650s 12342.549us 1 1 100.00
kmac_test_vectors_sha3_384 877.150s 78937.422us 1 1 100.00
kmac_test_vectors_sha3_512 869.250s 50811.673us 1 1 100.00
kmac_test_vectors_shake_128 149.800s 11386.407us 1 1 100.00
kmac_test_vectors_shake_256 1289.820s 99322.992us 1 1 100.00
kmac_test_vectors_kmac 1.960s 42.262us 1 1 100.00
kmac_test_vectors_kmac_xof 1.730s 124.965us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 164.770s 7628.708us 1 1 100.00
app 0 1 0.00
kmac_app 5.260s 155.311us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 7.400s 2023.663us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 9.150s 198.172us 0 1 0.00
error 0 1 0.00
kmac_error 11.790s 721.785us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.160s 4.843us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.770s 11.879us 0 1 0.00
edn_timeout_error 0 1 0.00
kmac_edn_timeout_error 15.140s 5679.908us 0 1 0.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 19.320s 1650.457us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.930s 46.503us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.190s 35.321us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 107.660s 10876.858us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.790s 15.743us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.870s 59.414us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.470s 102.571us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.470s 102.571us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.110s 76.893us 1 1 100.00
kmac_csr_rw 1.070s 36.304us 1 1 100.00
kmac_csr_aliasing 4.640s 878.982us 1 1 100.00
kmac_same_csr_outstanding 1.610s 329.425us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.110s 76.893us 1 1 100.00
kmac_csr_rw 1.070s 36.304us 1 1 100.00
kmac_csr_aliasing 4.640s 878.982us 1 1 100.00
kmac_same_csr_outstanding 1.610s 329.425us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.730s 146.723us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.730s 146.723us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.730s 146.723us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.730s 146.723us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 4.740s 877.092us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 55.570s 14901.727us 1 1 100.00
kmac_tl_intg_err 2.130s 220.442us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.130s 220.442us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.190s 35.321us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 23.370s 6592.157us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 164.770s 7628.708us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.730s 146.723us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 55.570s 14901.727us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 55.570s 14901.727us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 55.570s 14901.727us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 23.370s 6592.157us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.190s 35.321us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 55.570s 14901.727us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 1.060s 17.442us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 23.370s 6592.157us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 37.380s 1596.913us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 6 test runs
kmac_sideload_invalid 13660196210998471931686251615778144483560334670431667128107797758516363845714 76
UVM_INFO @ 11878557 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 52040134274219415622051710524439356557545563497836779485902987687614036812513 79
UVM_INFO @ 155311098 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 78260916657952113908042248905602915789385602390944479654358954561881084095234 80
UVM_INFO @ 2023663063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 21470414518617216729889382950083739660187474184399701492742559216663718867858 82
UVM_INFO @ 198172074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 89321035995051834874513863321623261454998099982722542233646807899133745591141 84
UVM_INFO @ 721785399 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 103606836561249328294693311133787892185155647684153984681366142062460491080192 77
UVM_INFO @ 46503223 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 3 test runs
kmac_mubi 37029918416242895143480598510055288447484038182829265939379466820658284552248 77
UVM_INFO @ 17442319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 85790268250983002529088330518020818499890446042013271564429862903026290168241 182
UVM_INFO @ 10876858479 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 34702514521128018910942118011764149383184421442175350465740087139426545763088 219
UVM_INFO @ 1596912630 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 2 test runs
kmac_key_error 48562152373950482174369179221462866546301177987351870170246278650399975245294 78
UVM_ERROR @ 4843456 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 4843456 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_edn_timeout_error 114516192184898370406550426452239582357093317327779228444912990431357753932280 87
UVM_ERROR @ 5679908102 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 5679908102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---