Simulation Results: kmac/masked

 
30/06/2026 15:30:29 DVSim: v1.49.11 sha: 9a3aadf json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.63 %
  • code
  • 68.35 %
  • assert
  • 97.05 %
  • func
  • 76.49 %
  • line
  • 95.43 %
  • branch
  • 89.44 %
  • cond
  • 83.60 %
  • toggle
  • 29.00 %
  • FSM
  • 44.30 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 3.330s 193.093us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.980s 61.575us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.930s 17.655us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 8.710s 923.861us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 2.870s 430.207us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.830s 56.036us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.930s 17.655us 1 1 100.00
kmac_csr_aliasing 2.870s 430.207us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.830s 13.429us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.240s 156.194us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 898.350s 196113.530us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 370.270s 5726.759us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 29.660s 9785.913us 1 1 100.00
kmac_test_vectors_sha3_256 25.090s 1388.199us 1 1 100.00
kmac_test_vectors_sha3_384 1082.440s 19315.861us 1 1 100.00
kmac_test_vectors_sha3_512 848.730s 14159.167us 1 1 100.00
kmac_test_vectors_shake_128 200.960s 65760.600us 1 1 100.00
kmac_test_vectors_shake_256 2576.360s 113516.568us 1 1 100.00
kmac_test_vectors_kmac 2.460s 246.518us 1 1 100.00
kmac_test_vectors_kmac_xof 2.660s 139.055us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 79.700s 4416.105us 1 1 100.00
app 0 1 0.00
kmac_app 0.990s 18.100us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 3.090s 79.816us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 6.980s 867.824us 0 1 0.00
error 0 1 0.00
kmac_error 24.490s 5233.804us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.040s 47.780us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.910s 46.555us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 28.620s 1715.342us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 0.800s 21.116us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.850s 86.143us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.340s 67.837us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 17.730s 1295.161us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.740s 43.018us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.900s 21.067us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 1.940s 382.393us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 1.940s 382.393us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.980s 61.575us 1 1 100.00
kmac_csr_rw 0.930s 17.655us 1 1 100.00
kmac_csr_aliasing 2.870s 430.207us 1 1 100.00
kmac_same_csr_outstanding 1.390s 67.084us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.980s 61.575us 1 1 100.00
kmac_csr_rw 0.930s 17.655us 1 1 100.00
kmac_csr_aliasing 2.870s 430.207us 1 1 100.00
kmac_same_csr_outstanding 1.390s 67.084us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.240s 55.936us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.240s 55.936us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.240s 55.936us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.240s 55.936us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.360s 447.242us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 40.830s 16810.145us 1 1 100.00
kmac_tl_intg_err 3.890s 798.651us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 3.890s 798.651us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.340s 67.837us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 3.330s 193.093us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 79.700s 4416.105us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.240s 55.936us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 40.830s 16810.145us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 40.830s 16810.145us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 40.830s 16810.145us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 3.330s 193.093us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.340s 67.837us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 40.830s 16810.145us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 6.800s 564.155us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 3.330s 193.093us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 34.760s 2937.430us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 6 test runs
kmac_sideload_invalid 68662217355518677777215313449603481067335813713785052896473101338868164366621 76
UVM_INFO @ 46555075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 83114591224482024417173521089752032807824825801687563773089126077404462016374 77
UVM_INFO @ 18100121 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 37988860451580804836453874798751355632249753040481222387121619502154589109989 78
UVM_INFO @ 79815542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 77862009683386812661788596513399381860391785565039912594717007130682296318070 80
UVM_INFO @ 867824150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 40255463266670246027021788752616723841839236304950102176127222771886595622533 90
UVM_INFO @ 5233803886 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 43978964658654059093328492501455431316923887499266524345138637738333211729762 123
UVM_INFO @ 1295161218 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 2 test runs
kmac_mubi 29690606361961444026182235452188853286846832538966069493026985973714211340678 79
UVM_INFO @ 564154983 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 105083111527312943693863701767262102968944820675967117310752783790343666360589 216
UVM_INFO @ 2937429895 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 2 test runs
kmac_key_error 55656417203686496430219267363789973689042515706907245520915314702736203427914 78
UVM_ERROR @ 47780393 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 47780393 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 63930691504471726922429156713404106652253323622584226205376227051493125336638 78
UVM_ERROR @ 86143493 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 86143493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---