Simulation Results: kmac/unmasked

 
30/06/2026 15:30:29 DVSim: v1.49.11 sha: 9a3aadf json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 79.14 %
  • code
  • 66.68 %
  • assert
  • 96.50 %
  • func
  • 74.23 %
  • line
  • 92.84 %
  • branch
  • 87.43 %
  • cond
  • 84.63 %
  • toggle
  • 27.62 %
  • FSM
  • 40.88 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 6.590s 224.431us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.180s 92.263us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.820s 74.511us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 8.550s 3128.064us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 5.440s 1831.612us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.490s 219.769us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.820s 74.511us 1 1 100.00
kmac_csr_aliasing 5.440s 1831.612us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.820s 12.886us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.190s 23.185us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 2597.070s 768494.830us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 406.600s 55249.379us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1452.400s 27258.668us 1 1 100.00
kmac_test_vectors_sha3_256 30.650s 10000.560us 1 1 100.00
kmac_test_vectors_sha3_384 1333.130s 194037.428us 1 1 100.00
kmac_test_vectors_sha3_512 623.960s 27694.787us 1 1 100.00
kmac_test_vectors_shake_128 151.530s 12210.109us 1 1 100.00
kmac_test_vectors_shake_256 78.130s 2227.190us 1 1 100.00
kmac_test_vectors_kmac 2.470s 103.443us 1 1 100.00
kmac_test_vectors_kmac_xof 1.780s 873.740us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 215.670s 17771.793us 1 1 100.00
app 0 1 0.00
kmac_app 0.960s 58.481us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 7.520s 598.341us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 7.730s 1905.513us 0 1 0.00
error 0 1 0.00
kmac_error 10.200s 986.098us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.190s 75.155us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 73.780s 10010.680us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 3.670s 1003.619us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 11.310s 3187.340us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 1.040s 34.550us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.300s 41.505us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 759.970s 89518.436us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.800s 14.628us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.940s 45.615us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.410s 49.483us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.410s 49.483us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.180s 92.263us 1 1 100.00
kmac_csr_rw 0.820s 74.511us 1 1 100.00
kmac_csr_aliasing 5.440s 1831.612us 1 1 100.00
kmac_same_csr_outstanding 2.140s 433.993us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.180s 92.263us 1 1 100.00
kmac_csr_rw 0.820s 74.511us 1 1 100.00
kmac_csr_aliasing 5.440s 1831.612us 1 1 100.00
kmac_same_csr_outstanding 2.140s 433.993us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.480s 233.611us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.480s 233.611us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.480s 233.611us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.480s 233.611us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 4.000s 805.323us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 29.410s 13257.132us 1 1 100.00
kmac_tl_intg_err 2.520s 224.829us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.520s 224.829us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.300s 41.505us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 6.590s 224.431us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 215.670s 17771.793us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.480s 233.611us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 29.410s 13257.132us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 29.410s 13257.132us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 29.410s 13257.132us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 6.590s 224.431us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.300s 41.505us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 29.410s 13257.132us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 32.700s 2187.714us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 6.590s 224.431us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 6.780s 327.319us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 7 test runs
kmac_app 113952512080971810129172969533371008377577880092054705697328607888086630949435 77
UVM_INFO @ 58480843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 37482250087092304071329642901307506825136949885601692483352863719113334777011 82
UVM_INFO @ 598341470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 32736298908561454121162832090521351288350353870212764182699633637558176155673 80
UVM_INFO @ 1905512656 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 52304451367183325431917994421136387536694504861573307292834010946580268014070 83
UVM_INFO @ 986098106 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 64223688094432663346309559634905843784213867945606332424452697608587814353783 77
UVM_INFO @ 34549754 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 91694895509959065200180925501914613213609261039415626997636953622161978081890 170
UVM_INFO @ 89518435896 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 12810934263901760084090727229398630253439385309246255226627030033405924559806 103
UVM_INFO @ 327319198 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) 1 test run
kmac_sideload_invalid 90313447598626075363356988586904985768396752481789450266028906318927337313045 78
UVM_INFO @ 10010680254 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 1 test run
kmac_mubi 114997217865474499233523103331289442064343629647954668742703915723308304197318 93
UVM_INFO @ 2187713569 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_key_error 49734275541540061847414778610378023096419228867760022830752357482351239833242 78
UVM_ERROR @ 75154699 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 75154699 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---