Simulation Results: otp_ctrl

 
30/06/2026 15:30:29 DVSim: v1.49.11 sha: 9a3aadf json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 84.07 %
  • code
  • 80.80 %
  • assert
  • 94.88 %
  • func
  • 76.54 %
  • line
  • 88.74 %
  • branch
  • 84.63 %
  • cond
  • 93.01 %
  • toggle
  • 90.90 %
  • FSM
  • 46.70 %
Validation stages
V1
88.89%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 1.410s 822.833us 1 1 100.00
smoke 1 1 100.00
otp_ctrl_smoke 3.880s 531.978us 1 1 100.00
csr_hw_reset 1 1 100.00
otp_ctrl_csr_hw_reset 1.840s 123.626us 1 1 100.00
csr_rw 1 1 100.00
otp_ctrl_csr_rw 1.350s 49.980us 1 1 100.00
csr_bit_bash 1 1 100.00
otp_ctrl_csr_bit_bash 4.480s 168.417us 1 1 100.00
csr_aliasing 1 1 100.00
otp_ctrl_csr_aliasing 2.180s 124.200us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
otp_ctrl_csr_mem_rw_with_rand_reset 1.320s 115.968us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otp_ctrl_csr_rw 1.350s 49.980us 1 1 100.00
otp_ctrl_csr_aliasing 2.180s 124.200us 1 1 100.00
mem_walk 1 1 100.00
otp_ctrl_mem_walk 1.240s 75.050us 1 1 100.00
mem_partial_access 1 1 100.00
otp_ctrl_mem_partial_access 1.560s 39.071us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 1 1 100.00
otp_ctrl_partition_walk 13.260s 757.610us 1 1 100.00
init_fail 1 1 100.00
otp_ctrl_init_fail 2.910s 321.885us 1 1 100.00
partition_check 2 2 100.00
otp_ctrl_background_chks 34.600s 21484.711us 1 1 100.00
otp_ctrl_check_fail 14.520s 3585.854us 1 1 100.00
regwen_during_otp_init 1 1 100.00
otp_ctrl_regwen 6.210s 1138.566us 1 1 100.00
partition_lock 1 1 100.00
otp_ctrl_dai_lock 7.640s 608.763us 1 1 100.00
interface_key_check 1 1 100.00
otp_ctrl_parallel_key_req 20.460s 1495.417us 1 1 100.00
lc_interactions 2 2 100.00
otp_ctrl_parallel_lc_req 11.040s 7297.139us 1 1 100.00
otp_ctrl_parallel_lc_esc 2.520s 366.104us 1 1 100.00
otp_dai_errors 1 1 100.00
otp_ctrl_dai_errs 8.350s 972.506us 1 1 100.00
otp_macro_errors 1 1 100.00
otp_ctrl_macro_errs 7.730s 2289.398us 1 1 100.00
test_access 1 1 100.00
otp_ctrl_test_access 13.790s 1073.226us 1 1 100.00
stress_all 1 1 100.00
otp_ctrl_stress_all 97.610s 14229.140us 1 1 100.00
intr_test 1 1 100.00
otp_ctrl_intr_test 1.600s 154.978us 1 1 100.00
alert_test 1 1 100.00
otp_ctrl_alert_test 1.550s 87.813us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otp_ctrl_tl_errors 3.210s 143.310us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otp_ctrl_tl_errors 3.210s 143.310us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otp_ctrl_csr_hw_reset 1.840s 123.626us 1 1 100.00
otp_ctrl_csr_rw 1.350s 49.980us 1 1 100.00
otp_ctrl_csr_aliasing 2.180s 124.200us 1 1 100.00
otp_ctrl_same_csr_outstanding 2.350s 310.703us 1 1 100.00
tl_d_partial_access 4 4 100.00
otp_ctrl_csr_hw_reset 1.840s 123.626us 1 1 100.00
otp_ctrl_csr_rw 1.350s 49.980us 1 1 100.00
otp_ctrl_csr_aliasing 2.180s 124.200us 1 1 100.00
otp_ctrl_same_csr_outstanding 2.350s 310.703us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
tl_intg_err 2 2 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
otp_ctrl_tl_intg_err 13.340s 1496.090us 1 1 100.00
prim_count_check 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
prim_fsm_check 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otp_ctrl_tl_intg_err 13.340s 1496.090us 1 1 100.00
sec_cm_secret_mem_scramble 1 1 100.00
otp_ctrl_smoke 3.880s 531.978us 1 1 100.00
sec_cm_part_mem_digest 1 1 100.00
otp_ctrl_smoke 3.880s 531.978us 1 1 100.00
sec_cm_dai_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_kdi_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_lci_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_part_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_scrmbl_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_timer_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_dai_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_kdi_seed_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_kdi_entropy_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_lci_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_part_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_scrmbl_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_timer_integ_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_timer_cnsty_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_timer_lfsr_redun 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_dai_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 2.520s 366.104us 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_lci_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 2.520s 366.104us 1 1 100.00
sec_cm_kdi_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 2.520s 366.104us 1 1 100.00
sec_cm_part_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 2.520s 366.104us 1 1 100.00
otp_ctrl_macro_errs 7.730s 2289.398us 1 1 100.00
sec_cm_scrmbl_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 2.520s 366.104us 1 1 100.00
sec_cm_timer_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 2.520s 366.104us 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_dai_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 2.520s 366.104us 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_lci_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 2.520s 366.104us 1 1 100.00
sec_cm_kdi_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 2.520s 366.104us 1 1 100.00
sec_cm_part_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 2.520s 366.104us 1 1 100.00
otp_ctrl_macro_errs 7.730s 2289.398us 1 1 100.00
sec_cm_scrmbl_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 2.520s 366.104us 1 1 100.00
sec_cm_timer_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 2.520s 366.104us 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_part_data_reg_integrity 1 1 100.00
otp_ctrl_init_fail 2.910s 321.885us 1 1 100.00
sec_cm_part_data_reg_bkgn_chk 1 1 100.00
otp_ctrl_check_fail 14.520s 3585.854us 1 1 100.00
sec_cm_part_mem_regren 1 1 100.00
otp_ctrl_dai_lock 7.640s 608.763us 1 1 100.00
sec_cm_part_mem_sw_unreadable 1 1 100.00
otp_ctrl_dai_lock 7.640s 608.763us 1 1 100.00
sec_cm_part_mem_sw_unwritable 1 1 100.00
otp_ctrl_dai_lock 7.640s 608.763us 1 1 100.00
sec_cm_lc_part_mem_sw_noaccess 1 1 100.00
otp_ctrl_dai_lock 7.640s 608.763us 1 1 100.00
sec_cm_access_ctrl_mubi 1 1 100.00
otp_ctrl_dai_lock 7.640s 608.763us 1 1 100.00
sec_cm_token_valid_ctrl_mubi 1 1 100.00
otp_ctrl_smoke 3.880s 531.978us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
otp_ctrl_dai_lock 7.640s 608.763us 1 1 100.00
sec_cm_test_bus_lc_gated 1 1 100.00
otp_ctrl_smoke 3.880s 531.978us 1 1 100.00
sec_cm_test_tl_lc_gate_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 110.640s 22606.580us 1 1 100.00
sec_cm_direct_access_config_regwen 1 1 100.00
otp_ctrl_regwen 6.210s 1138.566us 1 1 100.00
sec_cm_check_trigger_config_regwen 1 1 100.00
otp_ctrl_smoke 3.880s 531.978us 1 1 100.00
sec_cm_check_config_regwen 1 1 100.00
otp_ctrl_smoke 3.880s 531.978us 1 1 100.00
sec_cm_macro_mem_integrity 1 1 100.00
otp_ctrl_macro_errs 7.730s 2289.398us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 1 1 100.00
otp_ctrl_low_freq_read 10.650s 3602.885us 1 1 100.00
stress_all_with_rand_reset 1 1 100.00
otp_ctrl_stress_all_with_rand_reset 103.190s 22475.243us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (otp_ctrl_scoreboard.sv:1825) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * 1 test run
otp_ctrl_csr_mem_rw_with_rand_reset 40842904190165733116125132112043692359310790826755146572104268801008737007596 92
UVM_INFO @ 115968192 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---