Simulation Results

Simulation Results: kmac/masked

02/07/2026 15:30:32 DVSim: v1.49.12 sha: f99e229 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
80.68 %

code
68.93 %

assert
96.20 %

func
76.90 %

line
95.54 %

branch
89.75 %

cond
84.52 %

toggle
29.27 %

FSM
45.57 %

Validation stages

V1		100.00%
V2		75.86%
V2S		87.50%
V3		0.00%

8/8 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	kmac_smoke	55.170s	35150.707us	1	1	100.00
csr_hw_reset				1	1	100.00
	kmac_csr_hw_reset	1.030s	161.771us	1	1	100.00
csr_rw				1	1	100.00
	kmac_csr_rw	1.020s	124.998us	1	1	100.00
csr_bit_bash				1	1	100.00
	kmac_csr_bit_bash	12.410s	425.914us	1	1	100.00
csr_aliasing				1	1	100.00
	kmac_csr_aliasing	4.050s	1733.691us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	kmac_csr_mem_rw_with_rand_reset	1.510s	157.923us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	kmac_csr_rw	1.020s	124.998us	1	1	100.00
	kmac_csr_aliasing	4.050s	1733.691us	1	1	100.00
mem_walk				1	1	100.00
	kmac_mem_walk	0.740s	28.777us	1	1	100.00
mem_partial_access				1	1	100.00
	kmac_mem_partial_access	1.310s	241.486us	1	1	100.00

22/29 passed

75.86 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
long_msg_and_output				1	1	100.00
	kmac_long_msg_and_output	1842.580s	27183.090us	1	1	100.00
burst_write				1	1	100.00
	kmac_burst_write	405.500s	25651.924us	1	1	100.00
test_vectors				8	8	100.00
	kmac_test_vectors_sha3_224	28.860s	9842.903us	1	1	100.00
	kmac_test_vectors_sha3_256	2476.090s	211131.407us	1	1	100.00
	kmac_test_vectors_sha3_384	1554.160s	165541.261us	1	1	100.00
	kmac_test_vectors_sha3_512	794.580s	61148.447us	1	1	100.00
	kmac_test_vectors_shake_128	1984.500s	129373.017us	1	1	100.00
	kmac_test_vectors_shake_256	105.530s	15123.819us	1	1	100.00
	kmac_test_vectors_kmac	2.450s	119.022us	1	1	100.00
	kmac_test_vectors_kmac_xof	2.940s	176.084us	1	1	100.00
sideload				1	1	100.00
	kmac_sideload	178.200s	72638.469us	1	1	100.00
app				0	1	0.00
	kmac_app	4.400s	424.912us	0	1	0.00
app_with_partial_data				0	1	0.00
	kmac_app_with_partial_data	1.740s	120.286us	0	1	0.00
entropy_refresh				0	1	0.00
	kmac_entropy_refresh	5.570s	795.013us	0	1	0.00
error				0	1	0.00
	kmac_error	12.870s	769.413us	0	1	0.00
key_error				0	1	0.00
	kmac_key_error	0.960s	11.737us	0	1	0.00
sideload_invalid				0	1	0.00
	kmac_sideload_invalid	1.180s	10.049us	0	1	0.00
edn_timeout_error				1	1	100.00
	kmac_edn_timeout_error	1.210s	651.716us	1	1	100.00
entropy_mode_error				1	1	100.00
	kmac_entropy_mode_error	0.820s	17.880us	1	1	100.00
entropy_ready_error				0	1	0.00
	kmac_entropy_ready_error	0.870s	8.365us	0	1	0.00
lc_escalation				1	1	100.00
	kmac_lc_escalation	1.120s	41.065us	1	1	100.00
stress_all				1	1	100.00
	kmac_stress_all	89.280s	19440.255us	1	1	100.00
intr_test				1	1	100.00
	kmac_intr_test	0.730s	56.193us	1	1	100.00
alert_test				1	1	100.00
	kmac_alert_test	0.830s	19.849us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	kmac_tl_errors	2.930s	217.233us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	kmac_tl_errors	2.930s	217.233us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	kmac_csr_hw_reset	1.030s	161.771us	1	1	100.00
	kmac_csr_rw	1.020s	124.998us	1	1	100.00
	kmac_csr_aliasing	4.050s	1733.691us	1	1	100.00
	kmac_same_csr_outstanding	1.400s	64.740us	1	1	100.00
tl_d_partial_access				4	4	100.00
	kmac_csr_hw_reset	1.030s	161.771us	1	1	100.00
	kmac_csr_rw	1.020s	124.998us	1	1	100.00
	kmac_csr_aliasing	4.050s	1733.691us	1	1	100.00
	kmac_same_csr_outstanding	1.400s	64.740us	1	1	100.00

V2S

7/8 passed

87.50 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
shadow_reg_update_error				1	1	100.00
	kmac_shadow_reg_errors	1.200s	35.313us	1	1	100.00
shadow_reg_read_clear_staged_value				1	1	100.00
	kmac_shadow_reg_errors	1.200s	35.313us	1	1	100.00
shadow_reg_storage_error				1	1	100.00
	kmac_shadow_reg_errors	1.200s	35.313us	1	1	100.00
shadowed_reset_glitch				1	1	100.00
	kmac_shadow_reg_errors	1.200s	35.313us	1	1	100.00
shadow_reg_update_error_with_csr_rw				1	1	100.00
	kmac_shadow_reg_errors_with_csr_rw	2.840s	78.372us	1	1	100.00
tl_intg_err				2	2	100.00
	kmac_sec_cm	62.960s	58164.190us	1	1	100.00
	kmac_tl_intg_err	3.200s	1092.277us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	kmac_tl_intg_err	3.200s	1092.277us	1	1	100.00
sec_cm_lc_escalate_en_intersig_mubi				1	1	100.00
	kmac_lc_escalation	1.120s	41.065us	1	1	100.00
sec_cm_sw_key_key_masking				1	1	100.00
	kmac_smoke	55.170s	35150.707us	1	1	100.00
sec_cm_key_sideload				1	1	100.00
	kmac_sideload	178.200s	72638.469us	1	1	100.00
sec_cm_cfg_shadowed_config_shadow				1	1	100.00
	kmac_shadow_reg_errors	1.200s	35.313us	1	1	100.00
sec_cm_fsm_sparse				1	1	100.00
	kmac_sec_cm	62.960s	58164.190us	1	1	100.00
sec_cm_ctr_redun				1	1	100.00
	kmac_sec_cm	62.960s	58164.190us	1	1	100.00
sec_cm_packer_ctr_redun				1	1	100.00
	kmac_sec_cm	62.960s	58164.190us	1	1	100.00
sec_cm_cfg_shadowed_config_regwen				1	1	100.00
	kmac_smoke	55.170s	35150.707us	1	1	100.00
sec_cm_fsm_global_esc				1	1	100.00
	kmac_lc_escalation	1.120s	41.065us	1	1	100.00
sec_cm_fsm_local_esc				1	1	100.00
	kmac_sec_cm	62.960s	58164.190us	1	1	100.00
sec_cm_absorbed_ctrl_mubi				0	1	0.00
	kmac_mubi	4.840s	411.462us	0	1	0.00
sec_cm_sw_cmd_ctrl_sparse				1	1	100.00
	kmac_smoke	55.170s	35150.707us	1	1	100.00

0/1 passed

0.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
stress_all_with_rand_reset				0	1	0.00
	kmac_stress_all_with_rand_reset	45.060s	4547.656us	0	1	0.00

Error Messages

	Test	seed	line	log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [] vs []) Mismatch between unmasked_digest[] and dpi_digest[*]				6 test runs
	kmac_sideload_invalid	34975726990189155981891244098231818844439502173698247466805338076566599725718	76	UVM_INFO @ 10049103 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_app	110487608417123378779055306892393786625235181660582447344088784651496514198779	78	UVM_INFO @ 424911570 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_app_with_partial_data	36211690431145966765615664834192999403461254959931550333196323249916164767482	77	UVM_INFO @ 120286079 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_entropy_refresh	8614237347239879972765473213536443850277912067801638603369209460800810741146	79	UVM_INFO @ 795013196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_error	48287524186123045863793810877026892213936924404037467989868092952941373315523	85	UVM_INFO @ 769412506 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_entropy_ready_error	97142337260328766914461210623987890640594025544032791520768526867223736580785	77	UVM_INFO @ 8365089 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err)				2 test runs
	kmac_mubi	71003487617184087757453268745373070146236750846979879748589928849268610292538	79	UVM_INFO @ 411461538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_stress_all_with_rand_reset	33904193812080098967347198817723757965154647451576950880666389908934677004683	185	UVM_INFO @ 4547656133 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))'				1 test run
	kmac_key_error	20554134306981667755903223187269739182447568033668200151704819066557090456596	78	UVM_ERROR @ 11737347 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A UVM_INFO @ 11737347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---