Simulation Results: kmac/unmasked

 
02/07/2026 15:30:32 DVSim: v1.49.12 sha: f99e229 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 79.88 %
  • code
  • 67.19 %
  • assert
  • 97.52 %
  • func
  • 74.93 %
  • line
  • 93.86 %
  • branch
  • 88.12 %
  • cond
  • 84.18 %
  • toggle
  • 27.43 %
  • FSM
  • 42.34 %
Validation stages
V1
100.00%
V2
75.86%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 46.470s 4391.757us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.840s 23.980us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.010s 30.173us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 12.160s 858.907us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 3.760s 237.969us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.930s 78.171us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.010s 30.173us 1 1 100.00
kmac_csr_aliasing 3.760s 237.969us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.880s 13.666us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.470s 139.547us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 4001.620s 606855.431us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 491.560s 88538.002us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 2139.440s 100538.877us 1 1 100.00
kmac_test_vectors_sha3_256 2039.590s 99513.281us 1 1 100.00
kmac_test_vectors_sha3_384 19.750s 2139.227us 1 1 100.00
kmac_test_vectors_sha3_512 11.450s 1495.696us 1 1 100.00
kmac_test_vectors_shake_128 2883.830s 1145385.670us 1 1 100.00
kmac_test_vectors_shake_256 288.920s 100251.895us 1 1 100.00
kmac_test_vectors_kmac 2.220s 122.509us 1 1 100.00
kmac_test_vectors_kmac_xof 1.890s 44.970us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 111.900s 10940.544us 1 1 100.00
app 1 1 100.00
kmac_app 3.490s 198.843us 1 1 100.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 1.060s 12.354us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 1.080s 66.167us 0 1 0.00
error 0 1 0.00
kmac_error 90.290s 6130.110us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.130s 104.336us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.780s 20.189us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 5.520s 1057.779us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 18.960s 6370.256us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.920s 46.428us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.170s 104.436us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 1.780s 180.408us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.870s 21.960us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.820s 22.104us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.140s 55.575us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.140s 55.575us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.840s 23.980us 1 1 100.00
kmac_csr_rw 1.010s 30.173us 1 1 100.00
kmac_csr_aliasing 3.760s 237.969us 1 1 100.00
kmac_same_csr_outstanding 1.180s 91.596us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.840s 23.980us 1 1 100.00
kmac_csr_rw 1.010s 30.173us 1 1 100.00
kmac_csr_aliasing 3.760s 237.969us 1 1 100.00
kmac_same_csr_outstanding 1.180s 91.596us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.420s 60.080us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.420s 60.080us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.420s 60.080us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.420s 60.080us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.450s 111.951us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 30.320s 3456.426us 1 1 100.00
kmac_tl_intg_err 3.250s 515.212us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 3.250s 515.212us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.170s 104.436us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 46.470s 4391.757us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 111.900s 10940.544us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.420s 60.080us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 30.320s 3456.426us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 30.320s 3456.426us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 30.320s 3456.426us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 46.470s 4391.757us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.170s 104.436us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 30.320s 3456.426us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 2.600s 1341.386us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 46.470s 4391.757us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 63.700s 4969.865us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 6 test runs
kmac_sideload_invalid 21743424012841291737785571110728351838248995537262853911198436046860051914968 76
UVM_INFO @ 20189473 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 89391114448722248969717333566529613541836403082643068233422066723851841400351 77
UVM_INFO @ 12353537 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 75945402192704413819440447692011430066170695606690436718752596379230900737129 77
UVM_INFO @ 66167301 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 12399576624070776445464334633317643866533145412251810207135518845738711376199 128
UVM_INFO @ 6130109930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 110552575402315255657681049053495811366548050023378295804283434971650300245832 77
UVM_INFO @ 46427683 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 69385077357872409493028360035888555255557312837043387561137103285456285256677 144
UVM_INFO @ 4969865195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 2 test runs
kmac_mubi 15468382237896183253651479666402778276644715731268101604169302926933603811567 78
UVM_INFO @ 1341385973 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 105170619487088122677662518505412265236940359079180562325888312932816666156099 80
UVM_INFO @ 180408460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_key_error 34767358597432095061399884109846795180561893670286436843150368767193005510193 78
UVM_ERROR @ 104335566 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 104335566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---