Simulation Results: gpio

 
06/07/2026 15:30:30 DVSim: v1.49.12 sha: fa5c0ef json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.79 %
  • code
  • 93.54 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 97.41 %
  • toggle
  • 77.20 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 0.830s 42.324us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.060s 76.262us 1 1 100.00
gpio_smoke_en_cdc_prim 1.110s 103.800us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.840s 112.614us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.760s 20.751us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.860s 24.923us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 1.700s 46.214us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.140s 89.189us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 1.130s 56.520us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.860s 24.923us 1 1 100.00
gpio_csr_aliasing 1.140s 89.189us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 0.810s 47.388us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.460s 233.784us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.970s 108.269us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.550s 627.535us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 1.670s 485.999us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 1.360s 107.534us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 3.540s 370.633us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 1.680s 57.403us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 0.870s 205.497us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 17.820s 5382.596us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.700s 16.392us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.830s 40.499us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 0.970s 62.100us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 0.970s 62.100us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.860s 24.923us 1 1 100.00
gpio_same_csr_outstanding 0.780s 181.629us 1 1 100.00
gpio_csr_aliasing 1.140s 89.189us 1 1 100.00
gpio_csr_hw_reset 0.760s 20.751us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.860s 24.923us 1 1 100.00
gpio_same_csr_outstanding 0.780s 181.629us 1 1 100.00
gpio_csr_aliasing 1.140s 89.189us 1 1 100.00
gpio_csr_hw_reset 0.760s 20.751us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 0.850s 68.243us 1 1 100.00
gpio_sec_cm 0.850s 93.646us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 0.850s 68.243us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.620s 22.730us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 0.790s 7.262us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
gpio_stress_all 53807504455216459722066968288757255441894658413703472768059334192095292901055 479
UVM_INFO @ 5382596094 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 12025529062463712945735025600616671159918297552747461152342672363031656405600 80
UVM_INFO @ 7262088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---