Simulation Results

Simulation Results: kmac/unmasked

06/07/2026 15:30:30 DVSim: v1.49.12 sha: fa5c0ef json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
81.68 %

code
67.70 %

assert
98.10 %

func
79.25 %

line
94.07 %

branch
89.04 %

cond
86.15 %

toggle
27.62 %

FSM
41.61 %

Validation stages

V1		100.00%
V2		75.86%
V2S		87.50%
V3		0.00%

8/8 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	kmac_smoke	48.910s	12332.247us	1	1	100.00
csr_hw_reset				1	1	100.00
	kmac_csr_hw_reset	0.870s	148.241us	1	1	100.00
csr_rw				1	1	100.00
	kmac_csr_rw	0.830s	18.117us	1	1	100.00
csr_bit_bash				1	1	100.00
	kmac_csr_bit_bash	8.850s	1958.799us	1	1	100.00
csr_aliasing				1	1	100.00
	kmac_csr_aliasing	7.210s	1036.094us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	kmac_csr_mem_rw_with_rand_reset	1.360s	173.682us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	kmac_csr_rw	0.830s	18.117us	1	1	100.00
	kmac_csr_aliasing	7.210s	1036.094us	1	1	100.00
mem_walk				1	1	100.00
	kmac_mem_walk	0.750s	21.101us	1	1	100.00
mem_partial_access				1	1	100.00
	kmac_mem_partial_access	1.310s	40.123us	1	1	100.00

22/29 passed

75.86 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
long_msg_and_output				1	1	100.00
	kmac_long_msg_and_output	1158.180s	147625.652us	1	1	100.00
burst_write				1	1	100.00
	kmac_burst_write	338.430s	67923.376us	1	1	100.00
test_vectors				8	8	100.00
	kmac_test_vectors_sha3_224	39.050s	13973.834us	1	1	100.00
	kmac_test_vectors_sha3_256	23.610s	1479.472us	1	1	100.00
	kmac_test_vectors_sha3_384	19.650s	685.294us	1	1	100.00
	kmac_test_vectors_sha3_512	668.720s	59889.604us	1	1	100.00
	kmac_test_vectors_shake_128	1591.970s	32701.516us	1	1	100.00
	kmac_test_vectors_shake_256	280.700s	25023.403us	1	1	100.00
	kmac_test_vectors_kmac	1.990s	299.329us	1	1	100.00
	kmac_test_vectors_kmac_xof	1.660s	36.657us	1	1	100.00
sideload				1	1	100.00
	kmac_sideload	259.980s	45053.388us	1	1	100.00
app				0	1	0.00
	kmac_app	0.970s	38.381us	0	1	0.00
app_with_partial_data				0	1	0.00
	kmac_app_with_partial_data	0.960s	147.145us	0	1	0.00
entropy_refresh				0	1	0.00
	kmac_entropy_refresh	3.840s	288.938us	0	1	0.00
error				1	1	100.00
	kmac_error	14.320s	1218.883us	1	1	100.00
key_error				0	1	0.00
	kmac_key_error	0.870s	126.927us	0	1	0.00
sideload_invalid				0	1	0.00
	kmac_sideload_invalid	0.760s	16.593us	0	1	0.00
edn_timeout_error				1	1	100.00
	kmac_edn_timeout_error	26.760s	9255.288us	1	1	100.00
entropy_mode_error				1	1	100.00
	kmac_entropy_mode_error	31.760s	2347.382us	1	1	100.00
entropy_ready_error				0	1	0.00
	kmac_entropy_ready_error	1.040s	60.193us	0	1	0.00
lc_escalation				1	1	100.00
	kmac_lc_escalation	1.070s	50.917us	1	1	100.00
stress_all				0	1	0.00
	kmac_stress_all	427.220s	28787.436us	0	1	0.00
intr_test				1	1	100.00
	kmac_intr_test	0.970s	48.883us	1	1	100.00
alert_test				1	1	100.00
	kmac_alert_test	0.820s	32.291us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	kmac_tl_errors	2.180s	47.269us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	kmac_tl_errors	2.180s	47.269us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	kmac_csr_hw_reset	0.870s	148.241us	1	1	100.00
	kmac_csr_rw	0.830s	18.117us	1	1	100.00
	kmac_csr_aliasing	7.210s	1036.094us	1	1	100.00
	kmac_same_csr_outstanding	1.400s	226.305us	1	1	100.00
tl_d_partial_access				4	4	100.00
	kmac_csr_hw_reset	0.870s	148.241us	1	1	100.00
	kmac_csr_rw	0.830s	18.117us	1	1	100.00
	kmac_csr_aliasing	7.210s	1036.094us	1	1	100.00
	kmac_same_csr_outstanding	1.400s	226.305us	1	1	100.00

V2S

7/8 passed

87.50 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
shadow_reg_update_error				1	1	100.00
	kmac_shadow_reg_errors	1.620s	80.955us	1	1	100.00
shadow_reg_read_clear_staged_value				1	1	100.00
	kmac_shadow_reg_errors	1.620s	80.955us	1	1	100.00
shadow_reg_storage_error				1	1	100.00
	kmac_shadow_reg_errors	1.620s	80.955us	1	1	100.00
shadowed_reset_glitch				1	1	100.00
	kmac_shadow_reg_errors	1.620s	80.955us	1	1	100.00
shadow_reg_update_error_with_csr_rw				1	1	100.00
	kmac_shadow_reg_errors_with_csr_rw	2.320s	437.733us	1	1	100.00
tl_intg_err				2	2	100.00
	kmac_sec_cm	25.300s	12207.377us	1	1	100.00
	kmac_tl_intg_err	1.950s	120.391us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	kmac_tl_intg_err	1.950s	120.391us	1	1	100.00
sec_cm_lc_escalate_en_intersig_mubi				1	1	100.00
	kmac_lc_escalation	1.070s	50.917us	1	1	100.00
sec_cm_sw_key_key_masking				1	1	100.00
	kmac_smoke	48.910s	12332.247us	1	1	100.00
sec_cm_key_sideload				1	1	100.00
	kmac_sideload	259.980s	45053.388us	1	1	100.00
sec_cm_cfg_shadowed_config_shadow				1	1	100.00
	kmac_shadow_reg_errors	1.620s	80.955us	1	1	100.00
sec_cm_fsm_sparse				1	1	100.00
	kmac_sec_cm	25.300s	12207.377us	1	1	100.00
sec_cm_ctr_redun				1	1	100.00
	kmac_sec_cm	25.300s	12207.377us	1	1	100.00
sec_cm_packer_ctr_redun				1	1	100.00
	kmac_sec_cm	25.300s	12207.377us	1	1	100.00
sec_cm_cfg_shadowed_config_regwen				1	1	100.00
	kmac_smoke	48.910s	12332.247us	1	1	100.00
sec_cm_fsm_global_esc				1	1	100.00
	kmac_lc_escalation	1.070s	50.917us	1	1	100.00
sec_cm_fsm_local_esc				1	1	100.00
	kmac_sec_cm	25.300s	12207.377us	1	1	100.00
sec_cm_absorbed_ctrl_mubi				0	1	0.00
	kmac_mubi	3.500s	194.165us	0	1	0.00
sec_cm_sw_cmd_ctrl_sparse				1	1	100.00
	kmac_smoke	48.910s	12332.247us	1	1	100.00

0/1 passed

0.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
stress_all_with_rand_reset				0	1	0.00
	kmac_stress_all_with_rand_reset	1.460s	246.515us	0	1	0.00

Error Messages

	Test	seed	line	log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [] vs []) Mismatch between unmasked_digest[] and dpi_digest[*]				6 test runs
	kmac_sideload_invalid	51805974261325577187939393548372265872406178670478860389804842085523069847040	76	UVM_INFO @ 16592790 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_app	101507578951346925217933029506970217351717421086392138053339903252726236921414	77	UVM_INFO @ 38381366 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_app_with_partial_data	49726440859224615215217010804458109477270154471589636706991632193048540784755	77	UVM_INFO @ 147145485 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_entropy_refresh	31044516358897834508908998137984524682061142681237886094000774287933087323896	78	UVM_INFO @ 288938331 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_entropy_ready_error	109655839502783560728935319655859405196008471765129185094645438635988755024342	77	UVM_INFO @ 60193334 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_stress_all_with_rand_reset	49745219681497345507363755283289233720037414830900678637787869856680196043903	117	UVM_INFO @ 246514660 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err)				2 test runs
	kmac_mubi	44171079931610305225671168378452570265823983777024438642936676313898274014998	78	UVM_INFO @ 194164918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_stress_all	64472037690622767030221642429202429511040693425272642590277438922137555204074	165	UVM_INFO @ 28787435663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))'				1 test run
	kmac_key_error	79989322175945483738288099286021321084378910768275487811184238026305765661690	78	UVM_ERROR @ 126926878 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A UVM_INFO @ 126926878 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---