Simulation Results: kmac/masked

 
07/07/2026 15:30:27 DVSim: v1.49.12 sha: 32d4560 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 81.22 %
  • code
  • 68.73 %
  • assert
  • 96.91 %
  • func
  • 78.01 %
  • line
  • 95.43 %
  • branch
  • 89.32 %
  • cond
  • 84.42 %
  • toggle
  • 29.52 %
  • FSM
  • 44.94 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 54.910s 9664.254us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.940s 23.350us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.070s 35.318us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 6.790s 221.473us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 7.020s 989.081us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.590s 88.783us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.070s 35.318us 1 1 100.00
kmac_csr_aliasing 7.020s 989.081us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.810s 15.675us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.270s 108.579us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1751.010s 25712.618us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 162.980s 2468.152us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1643.660s 109650.586us 1 1 100.00
kmac_test_vectors_sha3_256 1676.090s 52041.665us 1 1 100.00
kmac_test_vectors_sha3_384 26.240s 2138.868us 1 1 100.00
kmac_test_vectors_sha3_512 1055.720s 50929.284us 1 1 100.00
kmac_test_vectors_shake_128 201.270s 36183.131us 1 1 100.00
kmac_test_vectors_shake_256 331.800s 28995.306us 1 1 100.00
kmac_test_vectors_kmac 2.330s 54.612us 1 1 100.00
kmac_test_vectors_kmac_xof 2.130s 53.877us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 339.390s 95969.426us 1 1 100.00
app 0 1 0.00
kmac_app 1.560s 56.573us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 1.290s 39.553us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 1.750s 316.246us 0 1 0.00
error 0 1 0.00
kmac_error 21.340s 438.096us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.260s 170.683us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 1.280s 61.764us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 40.590s 2255.240us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 1.130s 33.503us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 1.120s 10.553us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.310s 54.757us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 282.820s 11927.286us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.970s 63.695us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 1.000s 29.033us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.620s 132.528us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.620s 132.528us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.940s 23.350us 1 1 100.00
kmac_csr_rw 1.070s 35.318us 1 1 100.00
kmac_csr_aliasing 7.020s 989.081us 1 1 100.00
kmac_same_csr_outstanding 1.590s 44.422us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.940s 23.350us 1 1 100.00
kmac_csr_rw 1.070s 35.318us 1 1 100.00
kmac_csr_aliasing 7.020s 989.081us 1 1 100.00
kmac_same_csr_outstanding 1.590s 44.422us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.150s 211.641us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.150s 211.641us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.150s 211.641us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.150s 211.641us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 3.680s 395.695us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 31.120s 17674.128us 1 1 100.00
kmac_tl_intg_err 3.250s 120.528us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 3.250s 120.528us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.310s 54.757us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 54.910s 9664.254us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 339.390s 95969.426us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.150s 211.641us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 31.120s 17674.128us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 31.120s 17674.128us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 31.120s 17674.128us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 54.910s 9664.254us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.310s 54.757us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 31.120s 17674.128us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 6.180s 725.996us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 54.910s 9664.254us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 1.160s 9.813us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 8 test runs
kmac_sideload_invalid 21342077139111802863246018272506059338059089124655985091231728282050543213480 76
UVM_INFO @ 61764136 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 108921351003759968847671579610826150078933169557984585358918545721847988227844 77
UVM_INFO @ 56572614 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 23460589877694819602588219552352412150256788462601737116172288328430929440397 77
UVM_INFO @ 39552743 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 6170512455681812849320186290813083067177145927068058350448219287109736811331 77
UVM_INFO @ 316246492 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 89630253035111119255297208847583355619095727216588461787377538725154986918865 87
UVM_INFO @ 438096026 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 69969506273060739418166430427359675690829256453177651253086924275262658807818 77
UVM_INFO @ 10552672 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 21062950490334320372262310719898735166970382835052391750912211402466881909144 174
UVM_INFO @ 11927286449 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 1907374120857645385873306113922716767079925320740455368398285246568922387727 94
UVM_INFO @ 9812844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 1 test run
kmac_mubi 88547255374420582693470264638399556081654176008948293165637559654698529336801 79
UVM_INFO @ 725996498 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_key_error 38835574955387396051687869510978224970053584975885063419164736758081945835323 78
UVM_ERROR @ 170682936 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 170682936 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---