Simulation Results: entropy_src/rng_4bits

 
09/07/2026 15:30:27 DVSim: v1.49.12 sha: 527817d json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 76.25 %
  • code
  • 88.76 %
  • assert
  • 84.73 %
  • func
  • 55.25 %
  • block
  • 94.56 %
  • line
  • 97.21 %
  • branch
  • 86.86 %
  • toggle
  • 76.18 %
  • FSM
  • 94.79 %
Validation stages
V1
83.33%
V2
100.00%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 2.000s 77.913us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 2.000s 19.643us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 2.000s 31.514us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 4.000s 222.469us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 2.000s 48.099us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
entropy_src_csr_mem_rw_with_rand_reset 1.000s 13.988us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 2.000s 31.514us 1 1 100.00
entropy_src_csr_aliasing 2.000s 48.099us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 3 3 100.00
entropy_src_smoke 2.000s 77.913us 1 1 100.00
entropy_src_rng 54.000s 13293.920us 1 1 100.00
entropy_src_fw_ov 231.000s 14026.081us 1 1 100.00
firmware_mode 1 1 100.00
entropy_src_fw_ov 231.000s 14026.081us 1 1 100.00
rng_mode 1 1 100.00
entropy_src_rng 54.000s 13293.920us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 98.000s 14052.499us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 54.000s 13293.920us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 54.000s 13293.920us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 54.000s 13293.920us 1 1 100.00
entropy_src_intr 9.000s 1088.669us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 54.000s 13293.920us 1 1 100.00
entropy_src_functional_alerts 5.000s 178.039us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 2.000s 116.926us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 2.000s 133.750us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 2.000s 56.602us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 1.000s 69.127us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 1.000s 34.711us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 3.000s 94.549us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 3.000s 94.549us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 19.643us 1 1 100.00
entropy_src_csr_rw 2.000s 31.514us 1 1 100.00
entropy_src_csr_aliasing 2.000s 48.099us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 265.076us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 19.643us 1 1 100.00
entropy_src_csr_rw 2.000s 31.514us 1 1 100.00
entropy_src_csr_aliasing 2.000s 48.099us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 265.076us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 2.000s 56.945us 1 1 100.00
entropy_src_tl_intg_err 3.000s 167.813us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 54.000s 13293.920us 1 1 100.00
entropy_src_cfg_regwen 1.000s 68.585us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 54.000s 13293.920us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 54.000s 13293.920us 1 1 100.00
sec_cm_intersig_mubi 2 2 100.00
entropy_src_rng 54.000s 13293.920us 1 1 100.00
entropy_src_fw_ov 231.000s 14026.081us 1 1 100.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 133.750us 1 1 100.00
entropy_src_sec_cm 2.000s 56.945us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 133.750us 1 1 100.00
entropy_src_sec_cm 2.000s 56.945us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 54.000s 13293.920us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 133.750us 1 1 100.00
entropy_src_sec_cm 2.000s 56.945us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 133.750us 1 1 100.00
entropy_src_sec_cm 2.000s 56.945us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 2.000s 133.750us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 5.000s 178.039us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 3.000s 167.813us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 213.000s 13016.972us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
entropy_src_stress_all_with_rand_reset 2.000s 12.282us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror alert_fail_counts 1 test run
entropy_src_stress_all_with_rand_reset 37314987426860274726026968853056149633463319792954275333384972562992555879797 116
UVM_INFO @ 12281815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror markov_hi_total_fails 1 test run
entropy_src_csr_mem_rw_with_rand_reset 12714789357757257126183580287856152570825067579914868669712264261319916308991 113
UVM_INFO @ 13988280 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---