Simulation Results: kmac/unmasked

 
09/07/2026 15:30:27 DVSim: v1.49.12 sha: 527817d json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 79.83 %
  • code
  • 67.44 %
  • assert
  • 97.96 %
  • func
  • 74.09 %
  • line
  • 93.86 %
  • branch
  • 88.35 %
  • cond
  • 85.22 %
  • toggle
  • 27.45 %
  • FSM
  • 42.34 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 10.200s 1547.299us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.860s 24.706us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.890s 62.058us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 8.100s 948.268us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 2.780s 76.363us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.720s 37.319us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.890s 62.058us 1 1 100.00
kmac_csr_aliasing 2.780s 76.363us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.730s 26.167us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 0.930s 33.961us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 2271.500s 37617.326us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 367.250s 37921.534us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 34.180s 6517.285us 1 1 100.00
kmac_test_vectors_sha3_256 22.450s 814.111us 1 1 100.00
kmac_test_vectors_sha3_384 859.710s 20368.983us 1 1 100.00
kmac_test_vectors_sha3_512 585.200s 13218.205us 1 1 100.00
kmac_test_vectors_shake_128 1620.480s 31689.223us 1 1 100.00
kmac_test_vectors_shake_256 110.230s 53648.892us 1 1 100.00
kmac_test_vectors_kmac 1.710s 352.053us 1 1 100.00
kmac_test_vectors_kmac_xof 2.260s 138.947us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 201.410s 28361.571us 1 1 100.00
app 0 1 0.00
kmac_app 0.770s 6.718us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 1.040s 88.286us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 1.960s 615.314us 0 1 0.00
error 0 1 0.00
kmac_error 10.710s 287.994us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 0.900s 863.521us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.710s 15.406us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 9.230s 1851.349us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 9.760s 350.360us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.860s 140.560us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.110s 77.457us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 4.970s 3192.765us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.760s 43.570us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.760s 20.664us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 1.470s 45.553us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 1.470s 45.553us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.860s 24.706us 1 1 100.00
kmac_csr_rw 0.890s 62.058us 1 1 100.00
kmac_csr_aliasing 2.780s 76.363us 1 1 100.00
kmac_same_csr_outstanding 1.590s 139.292us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.860s 24.706us 1 1 100.00
kmac_csr_rw 0.890s 62.058us 1 1 100.00
kmac_csr_aliasing 2.780s 76.363us 1 1 100.00
kmac_same_csr_outstanding 1.590s 139.292us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.080s 57.116us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.080s 57.116us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.080s 57.116us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.080s 57.116us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 1.980s 570.932us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 57.470s 13685.786us 1 1 100.00
kmac_tl_intg_err 2.190s 526.894us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.190s 526.894us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.110s 77.457us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 10.200s 1547.299us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 201.410s 28361.571us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.080s 57.116us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 57.470s 13685.786us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 57.470s 13685.786us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 57.470s 13685.786us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 10.200s 1547.299us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.110s 77.457us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 57.470s 13685.786us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 10.850s 3663.011us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 10.200s 1547.299us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 29.730s 6371.205us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 8 test runs
kmac_sideload_invalid 14401853544832583516851938624723627460000690236171390553225274539292914104481 81
UVM_INFO @ 15406194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 5252719300041946962582563957214653525474971128891241256578783571340452286843 82
UVM_INFO @ 6718350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 84099554323634398851962306112722738644669609468183050825486043126741303330260 82
UVM_INFO @ 88286045 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 50136400743822783940944346014036399453984640672436446851990484495042609283713 83
UVM_INFO @ 615314296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 69010778646637235661517759458493093256263133485974239553208766199815785873096 91
UVM_INFO @ 287994302 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 25096585174166477985581290485474832909780446339051534073291970451366803031458 82
UVM_INFO @ 140559939 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 2624351042741190056533052978336785511047737621858166096199754568183928263001 81
UVM_INFO @ 3192764942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 23478744954911999916865380824398759312558486600607149262486460482135749641506 130
UVM_INFO @ 6371205241 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 1 test run
kmac_mubi 36475764470004186459397787820906680362140193135177086367790114726975974834851 86
UVM_INFO @ 3663010688 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_key_error 19964155927184960347477809971630563137499282154287941361452236517315773667857 78
UVM_ERROR @ 863521427 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 863521427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---