Simulation Results: rv_timer

 
09/07/2026 15:30:27 DVSim: v1.49.12 sha: 527817d json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.19 %
  • code
  • 99.65 %
  • assert
  • 98.73 %
  • func
  • 96.18 %
  • line
  • 100.00 %
  • branch
  • 100.00 %
  • cond
  • 99.38 %
  • toggle
  • 99.22 %
Validation stages
V1
100.00%
V2
90.91%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
random 1 1 100.00
rv_timer_random 0.790s 120.531us 1 1 100.00
csr_hw_reset 1 1 100.00
rv_timer_csr_hw_reset 0.540s 40.908us 1 1 100.00
csr_rw 1 1 100.00
rv_timer_csr_rw 0.560s 13.006us 1 1 100.00
csr_bit_bash 1 1 100.00
rv_timer_csr_bit_bash 1.180s 50.664us 1 1 100.00
csr_aliasing 1 1 100.00
rv_timer_csr_aliasing 0.770s 20.087us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
rv_timer_csr_mem_rw_with_rand_reset 0.720s 104.022us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
rv_timer_csr_rw 0.560s 13.006us 1 1 100.00
rv_timer_csr_aliasing 0.770s 20.087us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
random_reset 0 1 0.00
rv_timer_random_reset 0.820s 135.025us 0 1 0.00
disabled 1 1 100.00
rv_timer_disabled 1.330s 1018.074us 1 1 100.00
cfg_update_on_fly 1 1 100.00
rv_timer_cfg_update_on_fly 71.070s 96682.798us 1 1 100.00
no_interrupt_test 1 1 100.00
rv_timer_cfg_update_on_fly 71.070s 96682.798us 1 1 100.00
stress 1 1 100.00
rv_timer_stress_all 2.780s 4501.307us 1 1 100.00
alert_test 1 1 100.00
rv_timer_alert_test 0.510s 96.020us 1 1 100.00
intr_test 1 1 100.00
rv_timer_intr_test 0.530s 12.954us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
rv_timer_tl_errors 1.640s 45.095us 1 1 100.00
tl_d_illegal_access 1 1 100.00
rv_timer_tl_errors 1.640s 45.095us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
rv_timer_csr_hw_reset 0.540s 40.908us 1 1 100.00
rv_timer_csr_rw 0.560s 13.006us 1 1 100.00
rv_timer_csr_aliasing 0.770s 20.087us 1 1 100.00
rv_timer_same_csr_outstanding 0.770s 43.339us 1 1 100.00
tl_d_partial_access 4 4 100.00
rv_timer_csr_hw_reset 0.540s 40.908us 1 1 100.00
rv_timer_csr_rw 0.560s 13.006us 1 1 100.00
rv_timer_csr_aliasing 0.770s 20.087us 1 1 100.00
rv_timer_same_csr_outstanding 0.770s 43.339us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
rv_timer_sec_cm 0.710s 303.126us 1 1 100.00
rv_timer_tl_intg_err 0.750s 58.840us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
rv_timer_tl_intg_err 0.750s 58.840us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
min_value 0 1 0.00
rv_timer_min 0.590s 230.802us 0 1 0.00
max_value 0 1 0.00
rv_timer_max 0.620s 42.286us 0 1 0.00
stress_all_with_rand_reset 0 1 0.00
rv_timer_stress_all_with_rand_reset 3.590s 2312.269us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (rv_timer_base_vseq.sv:163) [intr_state_spinwait] timeout rv_timer_reg_block.intr_state* (addr=*) == * 2 test runs
rv_timer_min 39029809086144533558548738354227691982881767278906667591986387888489194650355 83
UVM_INFO @ 230801791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rv_timer_random_reset 95392468228601228628987585489026200077992738475987841591011363962107443913020 81
UVM_INFO @ 135025016 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (rv_timer_scoreboard.sv:231) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
rv_timer_max 76411370700507619753837496352555491849970524333932552439215563955491676395474 80
UVM_INFO @ 42286258 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 1 test run
rv_timer_stress_all_with_rand_reset 85242973789647169322966257634380946507695481944108402269055434784997240859188 161
UVM_INFO @ 2312268699 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---