Simulation Results: gpio

 
13/07/2026 15:30:34 DVSim: v1.49.12 sha: 68eb7b5 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.95 %
  • code
  • 92.74 %
  • assert
  • 98.10 %
  • func
  • 100.00 %
  • line
  • 98.93 %
  • branch
  • 99.01 %
  • cond
  • 97.98 %
  • toggle
  • 75.04 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.460s 66.986us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.120s 50.827us 1 1 100.00
gpio_smoke_en_cdc_prim 1.130s 184.183us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.240s 166.530us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.790s 16.645us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.720s 15.416us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 1.630s 183.712us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.270s 40.309us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 1.220s 145.372us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.720s 15.416us 1 1 100.00
gpio_csr_aliasing 1.270s 40.309us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 1.330s 40.854us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 0.820s 43.704us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.740s 242.801us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 0.960s 55.284us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 2.670s 1297.248us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 3.480s 324.128us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 12.460s 682.002us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 1.500s 882.659us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 0.920s 79.260us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 39.680s 56736.703us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.700s 14.000us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.710s 16.306us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 1.950s 75.092us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 1.950s 75.092us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.720s 15.416us 1 1 100.00
gpio_same_csr_outstanding 0.760s 33.745us 1 1 100.00
gpio_csr_aliasing 1.270s 40.309us 1 1 100.00
gpio_csr_hw_reset 0.790s 16.645us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.720s 15.416us 1 1 100.00
gpio_same_csr_outstanding 0.760s 33.745us 1 1 100.00
gpio_csr_aliasing 1.270s 40.309us 1 1 100.00
gpio_csr_hw_reset 0.790s 16.645us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.160s 173.449us 1 1 100.00
gpio_sec_cm 0.900s 520.051us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.160s 173.449us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 0 1 0.00
gpio_rand_straps 0.600s 1.253us 0 1 0.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 12.450s 2966.803us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 2 test runs
gpio_stress_all 61820067448133079625801271250498025582779522039723505419560891357346269258913 1657
UVM_INFO @ 56736703162 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 66790486445905776794158124936878791062750936822915769608082383361522013354467 75
UVM_INFO @ 1253188 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 32099799713688663421802883811394619373720433649598954977042072945200723144469 403
UVM_INFO @ 2966803439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---