Simulation Results: kmac/masked

 
13/07/2026 15:30:34 DVSim: v1.49.12 sha: 68eb7b5 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 81.20 %
  • code
  • 69.52 %
  • assert
  • 96.77 %
  • func
  • 77.32 %
  • line
  • 96.16 %
  • branch
  • 91.05 %
  • cond
  • 84.81 %
  • toggle
  • 29.39 %
  • FSM
  • 46.20 %
Validation stages
V1
100.00%
V2
72.41%
V2S
75.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 34.860s 1275.911us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.030s 36.834us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.000s 179.348us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 8.330s 1633.446us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 7.270s 541.909us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 2.240s 184.505us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.000s 179.348us 1 1 100.00
kmac_csr_aliasing 7.270s 541.909us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.790s 34.655us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.350s 45.362us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 4243.780s 532795.176us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 431.810s 52546.698us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 36.930s 13648.859us 1 1 100.00
kmac_test_vectors_sha3_256 33.230s 3035.083us 1 1 100.00
kmac_test_vectors_sha3_384 25.060s 2132.665us 1 1 100.00
kmac_test_vectors_sha3_512 11.730s 598.623us 1 1 100.00
kmac_test_vectors_shake_128 2054.490s 512244.973us 1 1 100.00
kmac_test_vectors_shake_256 2487.050s 112755.433us 1 1 100.00
kmac_test_vectors_kmac 2.200s 428.541us 1 1 100.00
kmac_test_vectors_kmac_xof 2.640s 203.955us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 7.030s 145.191us 1 1 100.00
app 0 1 0.00
kmac_app 7.920s 4183.915us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 9.270s 2258.023us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 6.860s 1993.298us 0 1 0.00
error 0 1 0.00
kmac_error 57.850s 4606.580us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.060s 133.483us 0 1 0.00
sideload_invalid 1 1 100.00
kmac_sideload_invalid 1.910s 126.710us 1 1 100.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 0.980s 71.912us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 0.780s 16.112us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.840s 29.317us 0 1 0.00
lc_escalation 0 1 0.00
kmac_lc_escalation 1.150s 123.423us 0 1 0.00
stress_all 0 1 0.00
kmac_stress_all 8.200s 2172.858us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.780s 13.483us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.800s 109.733us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 1.470s 29.853us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 1.470s 29.853us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.030s 36.834us 1 1 100.00
kmac_csr_rw 1.000s 179.348us 1 1 100.00
kmac_csr_aliasing 7.270s 541.909us 1 1 100.00
kmac_same_csr_outstanding 1.330s 361.444us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.030s 36.834us 1 1 100.00
kmac_csr_rw 1.000s 179.348us 1 1 100.00
kmac_csr_aliasing 7.270s 541.909us 1 1 100.00
kmac_same_csr_outstanding 1.330s 361.444us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.280s 350.954us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.280s 350.954us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.280s 350.954us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.280s 350.954us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.420s 143.008us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 27.200s 50856.786us 1 1 100.00
kmac_tl_intg_err 3.830s 437.995us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 3.830s 437.995us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 0 1 0.00
kmac_lc_escalation 1.150s 123.423us 0 1 0.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 34.860s 1275.911us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 7.030s 145.191us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.280s 350.954us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 27.200s 50856.786us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 27.200s 50856.786us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 27.200s 50856.786us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 34.860s 1275.911us 1 1 100.00
sec_cm_fsm_global_esc 0 1 0.00
kmac_lc_escalation 1.150s 123.423us 0 1 0.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 27.200s 50856.786us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 0.930s 19.138us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 34.860s 1275.911us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 36.640s 6347.888us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 5 test runs
kmac_app 115079693242165963149754343132669816466823396830108673338911324211316080649727 80
UVM_INFO @ 4183914653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 83870915227412484910497091965296300169677847322245081081573287346761452493185 81
UVM_INFO @ 2258023023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 2238390615952368269265640764092524689719318723544380017987595636323920957189 79
UVM_INFO @ 1993298075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 15268173758870327855021447141648771469084289424820510861481120085389359464310 110
UVM_INFO @ 4606580296 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_lc_escalation 10511758045490840623959955879568766428481013896908828901923162474203662884126 80
UVM_INFO @ 123422680 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 3 test runs
kmac_mubi 110075637850006894969332313689466538718723703901852628421233248053570728076796 77
UVM_INFO @ 19137641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 71279561606290846937383724483824607189794615444377864710688870164114270234850 84
UVM_INFO @ 2172858195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 30397974471500313994579280102292970063140624838114396862702187844091864409392 196
UVM_INFO @ 6347888254 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 2 test runs
kmac_key_error 101572332784764970671703990014380506161092058807772117560026932233987434387744 78
UVM_ERROR @ 133482524 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 133482524 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 74334529372321680524583009238249732787449992538075450644179124692525111218188 78
UVM_ERROR @ 29316822 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 29316822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---