Simulation Results

Simulation Results: kmac/unmasked

13/07/2026 15:30:34 DVSim: v1.49.12 sha: 68eb7b5 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
78.78 %

code
65.88 %

assert
96.50 %

func
73.96 %

line
92.84 %

branch
87.20 %

cond
81.92 %

toggle
27.30 %

FSM
40.15 %

Validation stages

V1		100.00%
V2		75.86%
V2S		87.50%
V3		0.00%

8/8 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	kmac_smoke	9.000s	1676.116us	1	1	100.00
csr_hw_reset				1	1	100.00
	kmac_csr_hw_reset	0.940s	21.601us	1	1	100.00
csr_rw				1	1	100.00
	kmac_csr_rw	1.170s	121.643us	1	1	100.00
csr_bit_bash				1	1	100.00
	kmac_csr_bit_bash	8.260s	812.258us	1	1	100.00
csr_aliasing				1	1	100.00
	kmac_csr_aliasing	3.820s	264.136us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	kmac_csr_mem_rw_with_rand_reset	1.670s	303.912us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	kmac_csr_rw	1.170s	121.643us	1	1	100.00
	kmac_csr_aliasing	3.820s	264.136us	1	1	100.00
mem_walk				1	1	100.00
	kmac_mem_walk	0.720s	21.959us	1	1	100.00
mem_partial_access				1	1	100.00
	kmac_mem_partial_access	1.820s	78.253us	1	1	100.00

22/29 passed

75.86 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
long_msg_and_output				1	1	100.00
	kmac_long_msg_and_output	1555.780s	152644.590us	1	1	100.00
burst_write				1	1	100.00
	kmac_burst_write	73.780s	10324.065us	1	1	100.00
test_vectors				8	8	100.00
	kmac_test_vectors_sha3_224	41.900s	31691.081us	1	1	100.00
	kmac_test_vectors_sha3_256	1289.290s	51824.275us	1	1	100.00
	kmac_test_vectors_sha3_384	1392.550s	945242.395us	1	1	100.00
	kmac_test_vectors_sha3_512	927.070s	642960.478us	1	1	100.00
	kmac_test_vectors_shake_128	166.630s	14712.013us	1	1	100.00
	kmac_test_vectors_shake_256	118.940s	150411.006us	1	1	100.00
	kmac_test_vectors_kmac	1.790s	850.902us	1	1	100.00
	kmac_test_vectors_kmac_xof	2.000s	386.296us	1	1	100.00
sideload				1	1	100.00
	kmac_sideload	254.480s	67462.543us	1	1	100.00
app				0	1	0.00
	kmac_app	7.260s	199.815us	0	1	0.00
app_with_partial_data				0	1	0.00
	kmac_app_with_partial_data	6.620s	717.172us	0	1	0.00
entropy_refresh				0	1	0.00
	kmac_entropy_refresh	2.760s	424.802us	0	1	0.00
error				0	1	0.00
	kmac_error	24.270s	1790.296us	0	1	0.00
key_error				0	1	0.00
	kmac_key_error	0.960s	52.821us	0	1	0.00
sideload_invalid				0	1	0.00
	kmac_sideload_invalid	1.060s	30.024us	0	1	0.00
edn_timeout_error				1	1	100.00
	kmac_edn_timeout_error	25.420s	6970.605us	1	1	100.00
entropy_mode_error				1	1	100.00
	kmac_entropy_mode_error	24.410s	1837.769us	1	1	100.00
entropy_ready_error				0	1	0.00
	kmac_entropy_ready_error	1.110s	61.943us	0	1	0.00
lc_escalation				1	1	100.00
	kmac_lc_escalation	1.180s	291.609us	1	1	100.00
stress_all				1	1	100.00
	kmac_stress_all	10.720s	8243.268us	1	1	100.00
intr_test				1	1	100.00
	kmac_intr_test	1.120s	18.244us	1	1	100.00
alert_test				1	1	100.00
	kmac_alert_test	0.750s	28.714us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	kmac_tl_errors	1.480s	290.330us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	kmac_tl_errors	1.480s	290.330us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	kmac_csr_hw_reset	0.940s	21.601us	1	1	100.00
	kmac_csr_rw	1.170s	121.643us	1	1	100.00
	kmac_csr_aliasing	3.820s	264.136us	1	1	100.00
	kmac_same_csr_outstanding	2.140s	1143.110us	1	1	100.00
tl_d_partial_access				4	4	100.00
	kmac_csr_hw_reset	0.940s	21.601us	1	1	100.00
	kmac_csr_rw	1.170s	121.643us	1	1	100.00
	kmac_csr_aliasing	3.820s	264.136us	1	1	100.00
	kmac_same_csr_outstanding	2.140s	1143.110us	1	1	100.00

V2S

7/8 passed

87.50 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
shadow_reg_update_error				1	1	100.00
	kmac_shadow_reg_errors	1.390s	32.262us	1	1	100.00
shadow_reg_read_clear_staged_value				1	1	100.00
	kmac_shadow_reg_errors	1.390s	32.262us	1	1	100.00
shadow_reg_storage_error				1	1	100.00
	kmac_shadow_reg_errors	1.390s	32.262us	1	1	100.00
shadowed_reset_glitch				1	1	100.00
	kmac_shadow_reg_errors	1.390s	32.262us	1	1	100.00
shadow_reg_update_error_with_csr_rw				1	1	100.00
	kmac_shadow_reg_errors_with_csr_rw	3.020s	256.891us	1	1	100.00
tl_intg_err				2	2	100.00
	kmac_sec_cm	23.640s	12205.610us	1	1	100.00
	kmac_tl_intg_err	2.610s	415.227us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	kmac_tl_intg_err	2.610s	415.227us	1	1	100.00
sec_cm_lc_escalate_en_intersig_mubi				1	1	100.00
	kmac_lc_escalation	1.180s	291.609us	1	1	100.00
sec_cm_sw_key_key_masking				1	1	100.00
	kmac_smoke	9.000s	1676.116us	1	1	100.00
sec_cm_key_sideload				1	1	100.00
	kmac_sideload	254.480s	67462.543us	1	1	100.00
sec_cm_cfg_shadowed_config_shadow				1	1	100.00
	kmac_shadow_reg_errors	1.390s	32.262us	1	1	100.00
sec_cm_fsm_sparse				1	1	100.00
	kmac_sec_cm	23.640s	12205.610us	1	1	100.00
sec_cm_ctr_redun				1	1	100.00
	kmac_sec_cm	23.640s	12205.610us	1	1	100.00
sec_cm_packer_ctr_redun				1	1	100.00
	kmac_sec_cm	23.640s	12205.610us	1	1	100.00
sec_cm_cfg_shadowed_config_regwen				1	1	100.00
	kmac_smoke	9.000s	1676.116us	1	1	100.00
sec_cm_fsm_global_esc				1	1	100.00
	kmac_lc_escalation	1.180s	291.609us	1	1	100.00
sec_cm_fsm_local_esc				1	1	100.00
	kmac_sec_cm	23.640s	12205.610us	1	1	100.00
sec_cm_absorbed_ctrl_mubi				0	1	0.00
	kmac_mubi	3.020s	169.173us	0	1	0.00
sec_cm_sw_cmd_ctrl_sparse				1	1	100.00
	kmac_smoke	9.000s	1676.116us	1	1	100.00

0/1 passed

0.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
stress_all_with_rand_reset				0	1	0.00
	kmac_stress_all_with_rand_reset	7.010s	241.806us	0	1	0.00

Error Messages

	Test	seed	line	log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [] vs []) Mismatch between unmasked_digest[] and dpi_digest[*]				6 test runs
	kmac_app	38082626081143691061532619529309411921195204359956695734173262626921302545087	82	UVM_INFO @ 199814553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_app_with_partial_data	104565994258373640235831361201085640767941837729867493752962465497275139784609	80	UVM_INFO @ 717171985 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_entropy_refresh	22776679095074703219747940310452458405923411068527725295672066322328604576640	78	UVM_INFO @ 424802349 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_error	68133943475092108369291729473713257471465355982554653297465867470127727244028	89	UVM_INFO @ 1790296151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_entropy_ready_error	37903769951523034021341325192602521426670016072306800810198999815380946133961	77	UVM_INFO @ 61942840 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_stress_all_with_rand_reset	76383149502327078607752283815193209696686621901365108075636279304024312014716	119	UVM_INFO @ 241806420 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))'				2 test runs
	kmac_sideload_invalid	63099955106999486831479093354507404543337157753624072480954972521861396634860	79	UVM_ERROR @ 30023766 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A UVM_INFO @ 30023766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_key_error	78009869493641411227025539494713215305127217205903549856094038357945526261483	78	UVM_ERROR @ 52820666 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A UVM_INFO @ 52820666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err)				1 test run
	kmac_mubi	71833473506486460285638333981860625953516939828169031662166113561702919345347	78	UVM_INFO @ 169172964 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---