Simulation Results: gpio

 
14/07/2026 15:30:29 DVSim: v1.49.12 sha: 84f5285 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.00 %
  • code
  • 95.91 %
  • assert
  • 98.10 %
  • func
  • 100.00 %
  • line
  • 98.93 %
  • branch
  • 99.01 %
  • cond
  • 97.98 %
  • toggle
  • 87.71 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 0.950s 70.401us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.100s 47.035us 1 1 100.00
gpio_smoke_en_cdc_prim 1.060s 160.636us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.060s 187.659us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.680s 20.600us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.720s 78.022us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 2.920s 1590.393us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.310s 231.622us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 1.240s 39.392us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.720s 78.022us 1 1 100.00
gpio_csr_aliasing 1.310s 231.622us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 0.870s 79.258us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.170s 35.581us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.780s 208.948us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.760s 240.974us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 2.500s 178.215us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 2.410s 157.722us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 3.980s 240.859us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 4.590s 600.104us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 1.100s 44.664us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 6.830s 8978.520us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.860s 10.558us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.680s 19.866us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 2.400s 172.082us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 2.400s 172.082us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.720s 78.022us 1 1 100.00
gpio_same_csr_outstanding 0.860s 26.938us 1 1 100.00
gpio_csr_aliasing 1.310s 231.622us 1 1 100.00
gpio_csr_hw_reset 0.680s 20.600us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.720s 78.022us 1 1 100.00
gpio_same_csr_outstanding 0.860s 26.938us 1 1 100.00
gpio_csr_aliasing 1.310s 231.622us 1 1 100.00
gpio_csr_hw_reset 0.680s 20.600us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.250s 617.610us 1 1 100.00
gpio_sec_cm 1.210s 66.460us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.250s 617.610us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 0 1 0.00
gpio_rand_straps 0.700s 2.568us 0 1 0.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 0.720s 6.788us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 2 test runs
gpio_stress_all 84847486092068922625579534586606363088126291793823162291112360324958830265552 171
UVM_INFO @ 8978519558 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 21629685723970324107005941929448799807272267807121326933273547566151148438237 75
UVM_INFO @ 2568207 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 50854118413618323465282605045210307321049812478656101842420696071236703789488 80
UVM_INFO @ 6788210 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---