Simulation Results

Simulation Results: kmac/masked

14/07/2026 15:30:29 DVSim: v1.49.12 sha: 84f5285 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
81.96 %

code
70.12 %

assert
98.03 %

func
77.73 %

line
96.16 %

branch
90.80 %

cond
87.34 %

toggle
29.44 %

FSM
46.84 %

Validation stages

V1		100.00%
V2		72.41%
V2S		87.50%
V3		100.00%

8/8 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	kmac_smoke	11.760s	1745.887us	1	1	100.00
csr_hw_reset				1	1	100.00
	kmac_csr_hw_reset	1.160s	106.966us	1	1	100.00
csr_rw				1	1	100.00
	kmac_csr_rw	0.890s	30.833us	1	1	100.00
csr_bit_bash				1	1	100.00
	kmac_csr_bit_bash	16.810s	11155.473us	1	1	100.00
csr_aliasing				1	1	100.00
	kmac_csr_aliasing	5.360s	527.771us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	kmac_csr_mem_rw_with_rand_reset	2.090s	80.978us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	kmac_csr_rw	0.890s	30.833us	1	1	100.00
	kmac_csr_aliasing	5.360s	527.771us	1	1	100.00
mem_walk				1	1	100.00
	kmac_mem_walk	0.860s	13.263us	1	1	100.00
mem_partial_access				1	1	100.00
	kmac_mem_partial_access	1.210s	63.113us	1	1	100.00

21/29 passed

72.41 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
long_msg_and_output				1	1	100.00
	kmac_long_msg_and_output	3024.600s	1748515.458us	1	1	100.00
burst_write				1	1	100.00
	kmac_burst_write	795.910s	108860.632us	1	1	100.00
test_vectors				8	8	100.00
	kmac_test_vectors_sha3_224	34.450s	2862.952us	1	1	100.00
	kmac_test_vectors_sha3_256	1577.320s	25937.590us	1	1	100.00
	kmac_test_vectors_sha3_384	19.830s	833.470us	1	1	100.00
	kmac_test_vectors_sha3_512	1166.320s	175555.676us	1	1	100.00
	kmac_test_vectors_shake_128	158.230s	38236.707us	1	1	100.00
	kmac_test_vectors_shake_256	109.850s	17571.818us	1	1	100.00
	kmac_test_vectors_kmac	2.870s	1240.903us	1	1	100.00
	kmac_test_vectors_kmac_xof	2.790s	85.782us	1	1	100.00
sideload				1	1	100.00
	kmac_sideload	87.520s	5125.552us	1	1	100.00
app				0	1	0.00
	kmac_app	2.710s	234.338us	0	1	0.00
app_with_partial_data				0	1	0.00
	kmac_app_with_partial_data	15.950s	4220.226us	0	1	0.00
entropy_refresh				0	1	0.00
	kmac_entropy_refresh	3.400s	68.348us	0	1	0.00
error				0	1	0.00
	kmac_error	55.310s	7235.402us	0	1	0.00
key_error				0	1	0.00
	kmac_key_error	0.990s	27.996us	0	1	0.00
sideload_invalid				0	1	0.00
	kmac_sideload_invalid	0.970s	25.304us	0	1	0.00
edn_timeout_error				1	1	100.00
	kmac_edn_timeout_error	39.620s	10932.547us	1	1	100.00
entropy_mode_error				1	1	100.00
	kmac_entropy_mode_error	14.620s	1307.223us	1	1	100.00
entropy_ready_error				0	1	0.00
	kmac_entropy_ready_error	1.340s	52.285us	0	1	0.00
lc_escalation				1	1	100.00
	kmac_lc_escalation	1.280s	106.815us	1	1	100.00
stress_all				0	1	0.00
	kmac_stress_all	12.120s	4855.111us	0	1	0.00
intr_test				1	1	100.00
	kmac_intr_test	0.840s	19.330us	1	1	100.00
alert_test				1	1	100.00
	kmac_alert_test	0.870s	46.817us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	kmac_tl_errors	2.690s	139.441us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	kmac_tl_errors	2.690s	139.441us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	kmac_csr_hw_reset	1.160s	106.966us	1	1	100.00
	kmac_csr_rw	0.890s	30.833us	1	1	100.00
	kmac_csr_aliasing	5.360s	527.771us	1	1	100.00
	kmac_same_csr_outstanding	1.520s	506.323us	1	1	100.00
tl_d_partial_access				4	4	100.00
	kmac_csr_hw_reset	1.160s	106.966us	1	1	100.00
	kmac_csr_rw	0.890s	30.833us	1	1	100.00
	kmac_csr_aliasing	5.360s	527.771us	1	1	100.00
	kmac_same_csr_outstanding	1.520s	506.323us	1	1	100.00

V2S

7/8 passed

87.50 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
shadow_reg_update_error				1	1	100.00
	kmac_shadow_reg_errors	1.070s	29.301us	1	1	100.00
shadow_reg_read_clear_staged_value				1	1	100.00
	kmac_shadow_reg_errors	1.070s	29.301us	1	1	100.00
shadow_reg_storage_error				1	1	100.00
	kmac_shadow_reg_errors	1.070s	29.301us	1	1	100.00
shadowed_reset_glitch				1	1	100.00
	kmac_shadow_reg_errors	1.070s	29.301us	1	1	100.00
shadow_reg_update_error_with_csr_rw				1	1	100.00
	kmac_shadow_reg_errors_with_csr_rw	2.170s	122.968us	1	1	100.00
tl_intg_err				2	2	100.00
	kmac_sec_cm	90.150s	9670.964us	1	1	100.00
	kmac_tl_intg_err	3.860s	209.132us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	kmac_tl_intg_err	3.860s	209.132us	1	1	100.00
sec_cm_lc_escalate_en_intersig_mubi				1	1	100.00
	kmac_lc_escalation	1.280s	106.815us	1	1	100.00
sec_cm_sw_key_key_masking				1	1	100.00
	kmac_smoke	11.760s	1745.887us	1	1	100.00
sec_cm_key_sideload				1	1	100.00
	kmac_sideload	87.520s	5125.552us	1	1	100.00
sec_cm_cfg_shadowed_config_shadow				1	1	100.00
	kmac_shadow_reg_errors	1.070s	29.301us	1	1	100.00
sec_cm_fsm_sparse				1	1	100.00
	kmac_sec_cm	90.150s	9670.964us	1	1	100.00
sec_cm_ctr_redun				1	1	100.00
	kmac_sec_cm	90.150s	9670.964us	1	1	100.00
sec_cm_packer_ctr_redun				1	1	100.00
	kmac_sec_cm	90.150s	9670.964us	1	1	100.00
sec_cm_cfg_shadowed_config_regwen				1	1	100.00
	kmac_smoke	11.760s	1745.887us	1	1	100.00
sec_cm_fsm_global_esc				1	1	100.00
	kmac_lc_escalation	1.280s	106.815us	1	1	100.00
sec_cm_fsm_local_esc				1	1	100.00
	kmac_sec_cm	90.150s	9670.964us	1	1	100.00
sec_cm_absorbed_ctrl_mubi				0	1	0.00
	kmac_mubi	1.150s	218.814us	0	1	0.00
sec_cm_sw_cmd_ctrl_sparse				1	1	100.00
	kmac_smoke	11.760s	1745.887us	1	1	100.00

1/1 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
stress_all_with_rand_reset				1	1	100.00
	kmac_stress_all_with_rand_reset	200.330s	33248.648us	1	1	100.00

Error Messages

	Test	seed	line	log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [] vs []) Mismatch between unmasked_digest[] and dpi_digest[*]				7 test runs
	kmac_sideload_invalid	33904475637251098700035193436342287132740099165576294412570155623073214105371	76	UVM_INFO @ 25303765 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_app	59326411187913402888601891515939690911317639421067447862884471603215620595352	78	UVM_INFO @ 234337910 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_app_with_partial_data	62902601544720352664490485500694181248105169042840655713280337490569302311771	83	UVM_INFO @ 4220226046 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_entropy_refresh	47449661433380246023531607696874538684008643418623536879877532721064527510777	79	UVM_INFO @ 68347713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_error	15858088559237554246949126666331028473431622092940906718473421736195220583383	98	UVM_INFO @ 7235402261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_entropy_ready_error	11156344766040387913272859511969260052340678709876739030907717391413468927348	77	UVM_INFO @ 52285118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_stress_all	2558341305245353480954598963388543933302888727528912562645364694167384708643	116	UVM_INFO @ 4855110976 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err)				1 test run
	kmac_mubi	55125796909536827035981806645373555984102075632741670663221017717853622195522	77	UVM_INFO @ 218813945 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))'				1 test run
	kmac_key_error	108262277010483114582327132048693434713983473166549554571220313680113216671434	78	UVM_ERROR @ 27995631 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A UVM_INFO @ 27995631 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---