Simulation Results: flash_ctrl

 
15/07/2026 15:30:26 DVSim: v1.49.12 sha: 189b2b0 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 95.62 %
  • code
  • 93.98 %
  • assert
  • 96.94 %
  • func
  • 95.94 %
  • line
  • 95.97 %
  • branch
  • 97.10 %
  • cond
  • 94.05 %
  • toggle
  • 97.74 %
  • FSM
  • 85.03 %
Validation stages
V1
100.00%
V2
96.55%
V2S
95.83%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
flash_ctrl_smoke 57.690s 137.206us 1 1 100.00
smoke_hw 1 1 100.00
flash_ctrl_smoke_hw 11.890s 17.864us 1 1 100.00
csr_hw_reset 1 1 100.00
flash_ctrl_csr_hw_reset 11.020s 39.899us 1 1 100.00
csr_rw 1 1 100.00
flash_ctrl_csr_rw 8.400s 190.086us 1 1 100.00
csr_bit_bash 1 1 100.00
flash_ctrl_csr_bit_bash 24.330s 499.083us 1 1 100.00
csr_aliasing 1 1 100.00
flash_ctrl_csr_aliasing 24.420s 6748.745us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
flash_ctrl_csr_mem_rw_with_rand_reset 8.580s 96.246us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
flash_ctrl_csr_rw 8.400s 190.086us 1 1 100.00
flash_ctrl_csr_aliasing 24.420s 6748.745us 1 1 100.00
mem_walk 1 1 100.00
flash_ctrl_mem_walk 6.730s 16.968us 1 1 100.00
mem_partial_access 1 1 100.00
flash_ctrl_mem_partial_access 6.450s 38.663us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sw_op 1 1 100.00
flash_ctrl_sw_op 10.160s 81.051us 1 1 100.00
host_read_direct 1 1 100.00
flash_ctrl_host_dir_rd 32.650s 54.642us 1 1 100.00
rma_hw_if 3 3 100.00
flash_ctrl_hw_rma 1164.400s 342064.344us 1 1 100.00
flash_ctrl_hw_rma_reset 581.280s 160207.553us 1 1 100.00
flash_ctrl_lcmgr_intg 6.530s 23.210us 1 1 100.00
host_controller_arb 1 1 100.00
flash_ctrl_host_ctrl_arb 998.040s 475018.180us 1 1 100.00
erase_suspend 1 1 100.00
flash_ctrl_erase_suspend 214.780s 20856.621us 1 1 100.00
program_reset 1 1 100.00
flash_ctrl_prog_reset 6.690s 134.467us 1 1 100.00
full_memory_access 1 1 100.00
flash_ctrl_full_mem_access 1857.500s 954147.367us 1 1 100.00
rd_buff_eviction 1 1 100.00
flash_ctrl_rd_buff_evict 49.240s 767.558us 1 1 100.00
rd_buff_eviction_w_ecc 3 3 100.00
flash_ctrl_rw_evict 13.820s 121.877us 1 1 100.00
flash_ctrl_rw_evict_all_en 15.590s 85.401us 1 1 100.00
flash_ctrl_re_evict 18.150s 299.236us 1 1 100.00
host_arb 1 1 100.00
flash_ctrl_phy_arb 128.630s 383.979us 1 1 100.00
host_interleave 1 1 100.00
flash_ctrl_phy_arb 128.630s 383.979us 1 1 100.00
memory_protection 1 1 100.00
flash_ctrl_mp_regions 199.100s 53075.719us 1 1 100.00
fetch_code 1 1 100.00
flash_ctrl_fetch_code 12.050s 819.720us 1 1 100.00
all_partitions 1 1 100.00
flash_ctrl_rand_ops 380.410s 745.605us 1 1 100.00
error_mp 1 1 100.00
flash_ctrl_error_mp 373.000s 17119.341us 1 1 100.00
error_prog_win 1 1 100.00
flash_ctrl_error_prog_win 338.940s 3576.529us 1 1 100.00
error_prog_type 1 1 100.00
flash_ctrl_error_prog_type 850.000s 1054.846us 1 1 100.00
error_read_seed 1 1 100.00
flash_ctrl_hw_read_seed_err 6.070s 48.305us 1 1 100.00
read_write_overflow 1 1 100.00
flash_ctrl_oversize_error 138.760s 10880.991us 1 1 100.00
flash_ctrl_disable 1 1 100.00
flash_ctrl_disable 10.160s 36.336us 1 1 100.00
flash_ctrl_connect 1 1 100.00
flash_ctrl_connect 7.510s 16.535us 1 1 100.00
stress_all 1 1 100.00
flash_ctrl_stress_all 241.550s 155.195us 1 1 100.00
secret_partition 2 2 100.00
flash_ctrl_hw_sec_otp 117.360s 11606.266us 1 1 100.00
flash_ctrl_otp_reset 61.290s 77.880us 1 1 100.00
isolation_partition 1 1 100.00
flash_ctrl_hw_rma 1164.400s 342064.344us 1 1 100.00
interrupts 3 4 75.00
flash_ctrl_intr_rd 105.390s 3081.732us 1 1 100.00
flash_ctrl_intr_wr 46.110s 2643.513us 1 1 100.00
flash_ctrl_intr_rd_slow_flash 194.050s 110435.264us 1 1 100.00
flash_ctrl_intr_wr_slow_flash 3603.825s 0.000us 0 1 0.00
invalid_op 1 1 100.00
flash_ctrl_invalid_op 43.510s 8239.507us 1 1 100.00
mid_op_rst 1 1 100.00
flash_ctrl_mid_op_rst 48.070s 7544.978us 1 1 100.00
double_bit_err 5 5 100.00
flash_ctrl_read_word_sweep_derr 13.010s 108.551us 1 1 100.00
flash_ctrl_ro_derr 102.590s 981.769us 1 1 100.00
flash_ctrl_rw_derr 177.010s 9251.950us 1 1 100.00
flash_ctrl_derr_detect 88.980s 1202.373us 1 1 100.00
flash_ctrl_integrity 388.270s 18482.173us 1 1 100.00
single_bit_err 3 3 100.00
flash_ctrl_read_word_sweep_serr 11.640s 107.136us 1 1 100.00
flash_ctrl_ro_serr 91.360s 1277.975us 1 1 100.00
flash_ctrl_rw_serr 175.180s 24048.285us 1 1 100.00
singlebit_err_counter 1 1 100.00
flash_ctrl_serr_counter 39.300s 9541.026us 1 1 100.00
singlebit_err_address 1 1 100.00
flash_ctrl_serr_address 42.710s 936.789us 1 1 100.00
scramble 5 5 100.00
flash_ctrl_wo 97.850s 8373.646us 1 1 100.00
flash_ctrl_write_word_sweep 7.020s 159.010us 1 1 100.00
flash_ctrl_read_word_sweep 6.710s 28.670us 1 1 100.00
flash_ctrl_ro 88.600s 1357.011us 1 1 100.00
flash_ctrl_rw 327.230s 7140.342us 1 1 100.00
filesystem_support 0 1 0.00
flash_ctrl_fs_sup 3604.014s 0.000us 0 1 0.00
rma_write_process_error 2 2 100.00
flash_ctrl_rma_err 549.810s 168273.937us 1 1 100.00
flash_ctrl_hw_prog_rma_wipe_err 68.520s 10019.994us 1 1 100.00
alert_test 1 1 100.00
flash_ctrl_alert_test 6.350s 78.940us 1 1 100.00
intr_test 1 1 100.00
flash_ctrl_intr_test 6.060s 37.594us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
flash_ctrl_tl_errors 10.730s 110.901us 1 1 100.00
tl_d_illegal_access 1 1 100.00
flash_ctrl_tl_errors 10.730s 110.901us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
flash_ctrl_csr_hw_reset 11.020s 39.899us 1 1 100.00
flash_ctrl_csr_rw 8.400s 190.086us 1 1 100.00
flash_ctrl_csr_aliasing 24.420s 6748.745us 1 1 100.00
flash_ctrl_same_csr_outstanding 12.430s 517.502us 1 1 100.00
tl_d_partial_access 4 4 100.00
flash_ctrl_csr_hw_reset 11.020s 39.899us 1 1 100.00
flash_ctrl_csr_rw 8.400s 190.086us 1 1 100.00
flash_ctrl_csr_aliasing 24.420s 6748.745us 1 1 100.00
flash_ctrl_same_csr_outstanding 12.430s 517.502us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
flash_ctrl_shadow_reg_errors 21.890s 25.628us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
flash_ctrl_shadow_reg_errors 21.890s 25.628us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
flash_ctrl_shadow_reg_errors 21.890s 25.628us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
flash_ctrl_shadow_reg_errors 21.890s 25.628us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
flash_ctrl_shadow_reg_errors_with_csr_rw 29.430s 1068.524us 1 1 100.00
tl_intg_err 2 2 100.00
flash_ctrl_sec_cm 1781.570s 2507.718us 1 1 100.00
flash_ctrl_tl_intg_err 318.010s 4560.886us 1 1 100.00
sec_cm_reg_bus_integrity 1 1 100.00
flash_ctrl_tl_intg_err 318.010s 4560.886us 1 1 100.00
sec_cm_host_bus_integrity 1 1 100.00
flash_ctrl_tl_intg_err 318.010s 4560.886us 1 1 100.00
sec_cm_mem_bus_integrity 2 2 100.00
flash_ctrl_rd_intg 16.640s 72.000us 1 1 100.00
flash_ctrl_wr_intg 6.940s 102.191us 1 1 100.00
sec_cm_scramble_key_sideload 1 1 100.00
flash_ctrl_smoke 57.690s 137.206us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 4 4 100.00
flash_ctrl_otp_reset 61.290s 77.880us 1 1 100.00
flash_ctrl_disable 10.160s 36.336us 1 1 100.00
flash_ctrl_sec_info_access 46.100s 2332.164us 1 1 100.00
flash_ctrl_connect 7.510s 16.535us 1 1 100.00
sec_cm_ctrl_config_regwen 1 1 100.00
flash_ctrl_config_regwen 5.990s 26.769us 1 1 100.00
sec_cm_data_regions_config_regwen 1 1 100.00
flash_ctrl_csr_rw 8.400s 190.086us 1 1 100.00
sec_cm_data_regions_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 21.890s 25.628us 1 1 100.00
sec_cm_info_regions_config_regwen 1 1 100.00
flash_ctrl_csr_rw 8.400s 190.086us 1 1 100.00
sec_cm_info_regions_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 21.890s 25.628us 1 1 100.00
sec_cm_bank_config_regwen 1 1 100.00
flash_ctrl_csr_rw 8.400s 190.086us 1 1 100.00
sec_cm_bank_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 21.890s 25.628us 1 1 100.00
sec_cm_mem_ctrl_global_esc 1 1 100.00
flash_ctrl_disable 10.160s 36.336us 1 1 100.00
sec_cm_mem_ctrl_local_esc 2 2 100.00
flash_ctrl_rd_intg 16.640s 72.000us 1 1 100.00
flash_ctrl_access_after_disable 6.480s 38.250us 1 1 100.00
sec_cm_mem_addr_infection 1 1 100.00
flash_ctrl_host_addr_infection 15.200s 41.833us 1 1 100.00
sec_cm_mem_disable_config_mubi 1 1 100.00
flash_ctrl_disable 10.160s 36.336us 1 1 100.00
sec_cm_exec_config_redun 1 1 100.00
flash_ctrl_fetch_code 12.050s 819.720us 1 1 100.00
sec_cm_mem_scramble 1 1 100.00
flash_ctrl_rw 327.230s 7140.342us 1 1 100.00
sec_cm_mem_integrity 3 3 100.00
flash_ctrl_rw_serr 175.180s 24048.285us 1 1 100.00
flash_ctrl_rw_derr 177.010s 9251.950us 1 1 100.00
flash_ctrl_integrity 388.270s 18482.173us 1 1 100.00
sec_cm_rma_entry_mem_sec_wipe 1 1 100.00
flash_ctrl_hw_rma 1164.400s 342064.344us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1781.570s 2507.718us 1 1 100.00
sec_cm_phy_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1781.570s 2507.718us 1 1 100.00
sec_cm_phy_prog_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1781.570s 2507.718us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
flash_ctrl_sec_cm 1781.570s 2507.718us 1 1 100.00
sec_cm_phy_arbiter_ctrl_redun 1 1 100.00
flash_ctrl_phy_arb_redun 8.360s 670.638us 1 1 100.00
sec_cm_phy_host_grant_ctrl_consistency 0 1 0.00
flash_ctrl_phy_host_grant_err 7.610s 38.284us 0 1 0.00
sec_cm_phy_ack_ctrl_consistency 1 1 100.00
flash_ctrl_phy_ack_consistency 6.650s 77.427us 1 1 100.00
sec_cm_fifo_ctr_redun 1 1 100.00
flash_ctrl_sec_cm 1781.570s 2507.718us 1 1 100.00
sec_cm_mem_tl_lc_gate_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1781.570s 2507.718us 1 1 100.00
sec_cm_prog_tl_lc_gate_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1781.570s 2507.718us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
asymmetric_read_path 1 1 100.00
flash_ctrl_rd_ooo 28.210s 236.283us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
flash_ctrl_basic_rw 338.080s 4735.407us 1 1 100.00

Error Messages

   Test seed line log context
Job timed out after * minutes 2 test runs
flash_ctrl_intr_wr_slow_flash 29909692076736045848583428668272258151451963128202407459536908476565721229729 None
flash_ctrl_fs_sup 25681815737744934388431860222215823521010182658984905538201111196056959782655 None
Offending '(!$isunknown((alert_tx.alert_p ^ alert_tx.alert_n)))' 1 test run
flash_ctrl_phy_host_grant_err 44419769947328689833427344274870043871692548118092906178609899282615210905934 125
UVM_ERROR @ 38284.0 ns: (alert_esc_if.sv:211) [ASSERT FAILED] AlertKnown_A
UVM_INFO @ 38284.0 ns: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---