Simulation Results: gpio

 
15/07/2026 15:30:26 DVSim: v1.49.12 sha: 189b2b0 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.38 %
  • code
  • 92.31 %
  • assert
  • 96.84 %
  • func
  • 99.99 %
  • line
  • 98.93 %
  • branch
  • 99.01 %
  • cond
  • 97.41 %
  • toggle
  • 73.88 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.100s 161.168us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.250s 217.282us 1 1 100.00
gpio_smoke_en_cdc_prim 1.070s 42.201us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.030s 143.234us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.660s 38.179us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.710s 20.459us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 2.880s 412.044us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.940s 35.998us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 0.800s 51.022us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.710s 20.459us 1 1 100.00
gpio_csr_aliasing 0.940s 35.998us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 1.140s 132.626us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 0.950s 64.494us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.790s 97.171us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.190s 113.261us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 1.970s 148.509us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 3.210s 509.880us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 5.970s 1041.126us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 3.500s 494.801us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 0.840s 136.421us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 15.380s 2561.320us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.830s 14.437us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.650s 108.432us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 2.090s 397.079us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 2.090s 397.079us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.710s 20.459us 1 1 100.00
gpio_same_csr_outstanding 0.800s 38.621us 1 1 100.00
gpio_csr_aliasing 0.940s 35.998us 1 1 100.00
gpio_csr_hw_reset 0.660s 38.179us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.710s 20.459us 1 1 100.00
gpio_same_csr_outstanding 0.800s 38.621us 1 1 100.00
gpio_csr_aliasing 0.940s 35.998us 1 1 100.00
gpio_csr_hw_reset 0.660s 38.179us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.060s 325.079us 1 1 100.00
gpio_sec_cm 0.770s 124.982us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.060s 325.079us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 0 1 0.00
gpio_rand_straps 0.640s 1.428us 0 1 0.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 6.700s 1065.403us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 2 test runs
gpio_stress_all 112430112739660144506188006742717964043979741511357729224789094956210574655479 612
UVM_INFO @ 2561319789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 111093996058080384908838224222224119378437403136578751370876596098815066809388 75
UVM_INFO @ 1427702 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 98301162341979523845798556099914920065203191505789366866212395944784750128295 83
UVM_INFO @ 1065402510 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---