Simulation Results: aes/unmasked

 
16/07/2026 15:30:28 DVSim: v1.49.12 sha: f3c0267 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 87.19 %
  • code
  • 89.09 %
  • assert
  • 97.73 %
  • func
  • 74.76 %
  • block
  • 89.44 %
  • line
  • 91.95 %
  • branch
  • 79.76 %
  • toggle
  • 97.99 %
  • FSM
  • 86.67 %
Validation stages
V1
100.00%
V2
100.00%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 70.668us 1 1 100.00
smoke 1 1 100.00
aes_smoke 2.000s 125.013us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 55.639us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 1.000s 64.181us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 6.000s 1434.115us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 2.000s 135.835us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 1.000s 70.625us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 1.000s 64.181us 1 1 100.00
aes_csr_aliasing 2.000s 135.835us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 2.000s 125.013us 1 1 100.00
aes_config_error 3.000s 93.903us 1 1 100.00
aes_stress 2.000s 79.017us 1 1 100.00
key_length 3 3 100.00
aes_smoke 2.000s 125.013us 1 1 100.00
aes_config_error 3.000s 93.903us 1 1 100.00
aes_stress 2.000s 79.017us 1 1 100.00
back2back 2 2 100.00
aes_stress 2.000s 79.017us 1 1 100.00
aes_b2b 3.000s 89.940us 1 1 100.00
backpressure 1 1 100.00
aes_stress 2.000s 79.017us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 2.000s 125.013us 1 1 100.00
aes_config_error 3.000s 93.903us 1 1 100.00
aes_stress 2.000s 79.017us 1 1 100.00
aes_alert_reset 2.000s 472.257us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 64.693us 1 1 100.00
aes_config_error 3.000s 93.903us 1 1 100.00
aes_alert_reset 2.000s 472.257us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 2.000s 76.272us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 4.000s 134.029us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 2.000s 472.257us 1 1 100.00
stress 1 1 100.00
aes_stress 2.000s 79.017us 1 1 100.00
sideload 2 2 100.00
aes_stress 2.000s 79.017us 1 1 100.00
aes_sideload 2.000s 122.748us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 3.000s 69.439us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 12.000s 1319.843us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 1.000s 56.373us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 3.000s 102.586us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 3.000s 102.586us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 55.639us 1 1 100.00
aes_csr_rw 1.000s 64.181us 1 1 100.00
aes_csr_aliasing 2.000s 135.835us 1 1 100.00
aes_same_csr_outstanding 2.000s 114.700us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 55.639us 1 1 100.00
aes_csr_rw 1.000s 64.181us 1 1 100.00
aes_csr_aliasing 2.000s 135.835us 1 1 100.00
aes_same_csr_outstanding 2.000s 114.700us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 3.000s 169.624us 1 1 100.00
fault_inject 1 3 33.33
aes_fi 4.000s 286.985us 0 1 0.00
aes_control_fi 2.000s 51.313us 1 1 100.00
aes_cipher_fi 5.000s 10081.347us 0 1 0.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 3.000s 132.185us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 3.000s 132.185us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 3.000s 132.185us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 3.000s 132.185us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 2.000s 142.649us 1 1 100.00
tl_intg_err 2 2 100.00
aes_sec_cm 3.000s 831.911us 1 1 100.00
aes_tl_intg_err 2.000s 887.886us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 2.000s 887.886us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 2.000s 472.257us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 3.000s 132.185us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 3.000s 132.185us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 2.000s 125.013us 1 1 100.00
aes_stress 2.000s 79.017us 1 1 100.00
aes_alert_reset 2.000s 472.257us 1 1 100.00
aes_core_fi 1.000s 86.858us 1 1 100.00
sec_cm_gcm_config_sparse 3 3 100.00
aes_config_error 3.000s 93.903us 1 1 100.00
aes_stress 2.000s 79.017us 1 1 100.00
aes_core_fi 1.000s 86.858us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 3.000s 132.185us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 76.922us 1 1 100.00
aes_stress 2.000s 79.017us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 2.000s 79.017us 1 1 100.00
aes_sideload 2.000s 122.748us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 76.922us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 76.922us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 76.922us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 76.922us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 76.922us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 2.000s 79.017us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 2.000s 79.017us 1 1 100.00
sec_cm_main_fsm_sparse 0 1 0.00
aes_fi 4.000s 286.985us 0 1 0.00
sec_cm_main_fsm_redun 2 4 50.00
aes_fi 4.000s 286.985us 0 1 0.00
aes_control_fi 2.000s 51.313us 1 1 100.00
aes_cipher_fi 5.000s 10081.347us 0 1 0.00
aes_ctr_fi 2.000s 81.897us 1 1 100.00
sec_cm_cipher_fsm_sparse 0 1 0.00
aes_fi 4.000s 286.985us 0 1 0.00
sec_cm_cipher_fsm_redun 1 3 33.33
aes_fi 4.000s 286.985us 0 1 0.00
aes_control_fi 2.000s 51.313us 1 1 100.00
aes_cipher_fi 5.000s 10081.347us 0 1 0.00
sec_cm_cipher_ctr_redun 0 1 0.00
aes_cipher_fi 5.000s 10081.347us 0 1 0.00
sec_cm_ctr_fsm_sparse 0 1 0.00
aes_fi 4.000s 286.985us 0 1 0.00
sec_cm_ctr_fsm_redun 2 3 66.67
aes_fi 4.000s 286.985us 0 1 0.00
aes_control_fi 2.000s 51.313us 1 1 100.00
aes_ctr_fi 2.000s 81.897us 1 1 100.00
sec_cm_ghash_fsm_sparse 0 1 0.00
aes_fi 4.000s 286.985us 0 1 0.00
sec_cm_ctrl_sparse 2 4 50.00
aes_fi 4.000s 286.985us 0 1 0.00
aes_control_fi 2.000s 51.313us 1 1 100.00
aes_cipher_fi 5.000s 10081.347us 0 1 0.00
aes_ctr_fi 2.000s 81.897us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 2.000s 472.257us 1 1 100.00
sec_cm_main_fsm_local_esc 2 4 50.00
aes_fi 4.000s 286.985us 0 1 0.00
aes_control_fi 2.000s 51.313us 1 1 100.00
aes_cipher_fi 5.000s 10081.347us 0 1 0.00
aes_ctr_fi 2.000s 81.897us 1 1 100.00
sec_cm_cipher_fsm_local_esc 2 4 50.00
aes_fi 4.000s 286.985us 0 1 0.00
aes_control_fi 2.000s 51.313us 1 1 100.00
aes_cipher_fi 5.000s 10081.347us 0 1 0.00
aes_ctr_fi 2.000s 81.897us 1 1 100.00
sec_cm_ctr_fsm_local_esc 2 3 66.67
aes_fi 4.000s 286.985us 0 1 0.00
aes_control_fi 2.000s 51.313us 1 1 100.00
aes_ctr_fi 2.000s 81.897us 1 1 100.00
sec_cm_ghash_fsm_local_esc 0 1 0.00
aes_fi 4.000s 286.985us 0 1 0.00
sec_cm_data_reg_local_esc 1 3 33.33
aes_fi 4.000s 286.985us 0 1 0.00
aes_control_fi 2.000s 51.313us 1 1 100.00
aes_cipher_fi 5.000s 10081.347us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 9.000s 1892.977us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (aes_scoreboard.sv:926) scoreboard [scoreboard] 1 test run
aes_fi 44760455604130908672423469480816182086519952225940379888802729299640149197873 17053
----| NO FAILURES BUT NUMBER OF EXPECTED MESSAGES DOES NOT MATCH ACTUAL
----| Expected: 4
----| Seen: 3
----| Expected corrupted: 0
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! 1 test run
aes_cipher_fi 20085596671243128400328188551836650600191540705947815370591348423364903749927 138
UVM_INFO @ 10081347213 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [aes_common_vseq] Check failed (vseq_done) 1 test run
aes_stress_all_with_rand_reset 56625266344700637867400043184596064284667829203396578520773273273523453597294 394
UVM_INFO @ 1892976882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---