Simulation Results: alert_handler

 
16/07/2026 15:30:28 DVSim: v1.49.12 sha: f3c0267 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 90.31 %
  • code
  • 90.68 %
  • assert
  • 98.12 %
  • func
  • 82.13 %
  • line
  • 99.64 %
  • branch
  • 98.64 %
  • cond
  • 91.36 %
  • toggle
  • 91.20 %
  • FSM
  • 72.58 %
Validation stages
V1
100.00%
V2
94.74%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
alert_handler_smoke 44.970s 6320.105us 1 1 100.00
csr_hw_reset 1 1 100.00
alert_handler_csr_hw_reset 5.020s 413.765us 1 1 100.00
csr_rw 1 1 100.00
alert_handler_csr_rw 4.450s 128.204us 1 1 100.00
csr_bit_bash 1 1 100.00
alert_handler_csr_bit_bash 76.820s 1202.454us 1 1 100.00
csr_aliasing 1 1 100.00
alert_handler_csr_aliasing 86.160s 7850.480us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
alert_handler_csr_mem_rw_with_rand_reset 3.630s 100.632us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
alert_handler_csr_rw 4.450s 128.204us 1 1 100.00
alert_handler_csr_aliasing 86.160s 7850.480us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
esc_accum 1 1 100.00
alert_handler_esc_alert_accum 88.210s 14011.565us 1 1 100.00
esc_timeout 1 1 100.00
alert_handler_esc_intr_timeout 21.050s 406.701us 1 1 100.00
entropy 1 1 100.00
alert_handler_entropy 1923.030s 103426.687us 1 1 100.00
sig_int_fail 1 1 100.00
alert_handler_sig_int_fail 12.750s 383.808us 1 1 100.00
clk_skew 1 1 100.00
alert_handler_smoke 44.970s 6320.105us 1 1 100.00
random_alerts 1 1 100.00
alert_handler_random_alerts 11.000s 1056.117us 1 1 100.00
random_classes 1 1 100.00
alert_handler_random_classes 20.360s 1882.638us 1 1 100.00
ping_timeout 1 1 100.00
alert_handler_ping_timeout 47.920s 4103.181us 1 1 100.00
lpg 2 2 100.00
alert_handler_lpg 2585.330s 476680.868us 1 1 100.00
alert_handler_lpg_stub_clk 676.450s 24144.356us 1 1 100.00
stress_all 1 1 100.00
alert_handler_stress_all 2725.430s 520573.673us 1 1 100.00
alert_handler_entropy_stress_test 0 1 0.00
alert_handler_entropy_stress 7.490s 896.648us 0 1 0.00
alert_handler_alert_accum_saturation 1 1 100.00
alert_handler_alert_accum_saturation 2.070s 65.889us 1 1 100.00
intr_test 1 1 100.00
alert_handler_intr_test 1.170s 8.006us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
alert_handler_tl_errors 3.380s 180.803us 1 1 100.00
tl_d_illegal_access 1 1 100.00
alert_handler_tl_errors 3.380s 180.803us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
alert_handler_csr_hw_reset 5.020s 413.765us 1 1 100.00
alert_handler_csr_rw 4.450s 128.204us 1 1 100.00
alert_handler_csr_aliasing 86.160s 7850.480us 1 1 100.00
alert_handler_same_csr_outstanding 12.330s 352.610us 1 1 100.00
tl_d_partial_access 4 4 100.00
alert_handler_csr_hw_reset 5.020s 413.765us 1 1 100.00
alert_handler_csr_rw 4.450s 128.204us 1 1 100.00
alert_handler_csr_aliasing 86.160s 7850.480us 1 1 100.00
alert_handler_same_csr_outstanding 12.330s 352.610us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
alert_handler_shadow_reg_errors 189.000s 5000.189us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
alert_handler_shadow_reg_errors 189.000s 5000.189us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
alert_handler_shadow_reg_errors 189.000s 5000.189us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
alert_handler_shadow_reg_errors 189.000s 5000.189us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
alert_handler_shadow_reg_errors_with_csr_rw 732.500s 60427.293us 1 1 100.00
tl_intg_err 2 2 100.00
alert_handler_sec_cm 12.950s 704.482us 1 1 100.00
alert_handler_tl_intg_err 2.950s 66.639us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
alert_handler_tl_intg_err 2.950s 66.639us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
alert_handler_shadow_reg_errors 189.000s 5000.189us 1 1 100.00
sec_cm_ping_timer_config_regwen 1 1 100.00
alert_handler_smoke 44.970s 6320.105us 1 1 100.00
sec_cm_alert_config_regwen 1 1 100.00
alert_handler_smoke 44.970s 6320.105us 1 1 100.00
sec_cm_alert_loc_config_regwen 1 1 100.00
alert_handler_smoke 44.970s 6320.105us 1 1 100.00
sec_cm_class_config_regwen 1 1 100.00
alert_handler_smoke 44.970s 6320.105us 1 1 100.00
sec_cm_alert_intersig_diff 1 1 100.00
alert_handler_sig_int_fail 12.750s 383.808us 1 1 100.00
sec_cm_lpg_intersig_mubi 1 1 100.00
alert_handler_lpg 2585.330s 476680.868us 1 1 100.00
sec_cm_esc_intersig_diff 1 1 100.00
alert_handler_sig_int_fail 12.750s 383.808us 1 1 100.00
sec_cm_alert_rx_intersig_bkgn_chk 1 1 100.00
alert_handler_entropy 1923.030s 103426.687us 1 1 100.00
sec_cm_esc_tx_intersig_bkgn_chk 1 1 100.00
alert_handler_entropy 1923.030s 103426.687us 1 1 100.00
sec_cm_esc_timer_fsm_sparse 1 1 100.00
alert_handler_sec_cm 12.950s 704.482us 1 1 100.00
sec_cm_ping_timer_fsm_sparse 1 1 100.00
alert_handler_sec_cm 12.950s 704.482us 1 1 100.00
sec_cm_esc_timer_fsm_local_esc 1 1 100.00
alert_handler_sec_cm 12.950s 704.482us 1 1 100.00
sec_cm_ping_timer_fsm_local_esc 1 1 100.00
alert_handler_sec_cm 12.950s 704.482us 1 1 100.00
sec_cm_esc_timer_fsm_global_esc 1 1 100.00
alert_handler_sec_cm 12.950s 704.482us 1 1 100.00
sec_cm_accu_ctr_redun 1 1 100.00
alert_handler_sec_cm 12.950s 704.482us 1 1 100.00
sec_cm_esc_timer_ctr_redun 1 1 100.00
alert_handler_sec_cm 12.950s 704.482us 1 1 100.00
sec_cm_ping_timer_ctr_redun 1 1 100.00
alert_handler_sec_cm 12.950s 704.482us 1 1 100.00
sec_cm_ping_timer_lfsr_redun 1 1 100.00
alert_handler_sec_cm 12.950s 704.482us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
alert_handler_stress_all_with_rand_reset 17.890s 1858.815us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped 1 test run
alert_handler_entropy_stress 114126674945647625197611276850048666299266513590256482079907663524918244727031 190
UVM_INFO @ 896648264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1286) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. 1 test run
alert_handler_stress_all_with_rand_reset 81548502183828255155607288006450631625122675984655586630571893534767812400369 87
UVM_INFO @ 1858815228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---