Simulation Results

Simulation Results: kmac/unmasked

16/07/2026 15:30:28 DVSim: v1.49.12 sha: f3c0267 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
80.33 %

code
67.32 %

assert
97.08 %

func
76.60 %

line
93.89 %

branch
88.43 %

cond
85.30 %

toggle
27.39 %

FSM
41.61 %

Validation stages

V1		100.00%
V2		75.86%
V2S		87.50%
V3		0.00%

8/8 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	kmac_smoke	26.420s	989.925us	1	1	100.00
csr_hw_reset				1	1	100.00
	kmac_csr_hw_reset	1.340s	109.941us	1	1	100.00
csr_rw				1	1	100.00
	kmac_csr_rw	0.900s	19.798us	1	1	100.00
csr_bit_bash				1	1	100.00
	kmac_csr_bit_bash	16.560s	6489.478us	1	1	100.00
csr_aliasing				1	1	100.00
	kmac_csr_aliasing	9.680s	784.201us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	kmac_csr_mem_rw_with_rand_reset	1.860s	160.119us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	kmac_csr_rw	0.900s	19.798us	1	1	100.00
	kmac_csr_aliasing	9.680s	784.201us	1	1	100.00
mem_walk				1	1	100.00
	kmac_mem_walk	0.790s	43.151us	1	1	100.00
mem_partial_access				1	1	100.00
	kmac_mem_partial_access	1.380s	401.110us	1	1	100.00

22/29 passed

75.86 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
long_msg_and_output				1	1	100.00
	kmac_long_msg_and_output	496.990s	98054.719us	1	1	100.00
burst_write				1	1	100.00
	kmac_burst_write	259.900s	4939.229us	1	1	100.00
test_vectors				8	8	100.00
	kmac_test_vectors_sha3_224	33.700s	11314.328us	1	1	100.00
	kmac_test_vectors_sha3_256	1272.960s	24605.333us	1	1	100.00
	kmac_test_vectors_sha3_384	903.470s	77385.689us	1	1	100.00
	kmac_test_vectors_sha3_512	624.850s	14220.256us	1	1	100.00
	kmac_test_vectors_shake_128	113.850s	3121.913us	1	1	100.00
	kmac_test_vectors_shake_256	289.790s	29000.307us	1	1	100.00
	kmac_test_vectors_kmac	1.720s	168.734us	1	1	100.00
	kmac_test_vectors_kmac_xof	2.370s	89.433us	1	1	100.00
sideload				1	1	100.00
	kmac_sideload	158.630s	15403.875us	1	1	100.00
app				0	1	0.00
	kmac_app	3.010s	310.302us	0	1	0.00
app_with_partial_data				0	1	0.00
	kmac_app_with_partial_data	2.450s	206.083us	0	1	0.00
entropy_refresh				0	1	0.00
	kmac_entropy_refresh	6.030s	990.057us	0	1	0.00
error				0	1	0.00
	kmac_error	35.560s	2531.238us	0	1	0.00
key_error				0	1	0.00
	kmac_key_error	1.250s	134.542us	0	1	0.00
sideload_invalid				0	1	0.00
	kmac_sideload_invalid	1.020s	59.771us	0	1	0.00
edn_timeout_error				1	1	100.00
	kmac_edn_timeout_error	16.070s	4510.131us	1	1	100.00
entropy_mode_error				1	1	100.00
	kmac_entropy_mode_error	23.740s	2157.763us	1	1	100.00
entropy_ready_error				0	1	0.00
	kmac_entropy_ready_error	1.050s	21.827us	0	1	0.00
lc_escalation				1	1	100.00
	kmac_lc_escalation	1.570s	58.323us	1	1	100.00
stress_all				1	1	100.00
	kmac_stress_all	600.530s	36502.985us	1	1	100.00
intr_test				1	1	100.00
	kmac_intr_test	1.060s	25.897us	1	1	100.00
alert_test				1	1	100.00
	kmac_alert_test	0.910s	20.448us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	kmac_tl_errors	2.700s	249.662us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	kmac_tl_errors	2.700s	249.662us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	kmac_csr_hw_reset	1.340s	109.941us	1	1	100.00
	kmac_csr_rw	0.900s	19.798us	1	1	100.00
	kmac_csr_aliasing	9.680s	784.201us	1	1	100.00
	kmac_same_csr_outstanding	1.640s	39.951us	1	1	100.00
tl_d_partial_access				4	4	100.00
	kmac_csr_hw_reset	1.340s	109.941us	1	1	100.00
	kmac_csr_rw	0.900s	19.798us	1	1	100.00
	kmac_csr_aliasing	9.680s	784.201us	1	1	100.00
	kmac_same_csr_outstanding	1.640s	39.951us	1	1	100.00

V2S

7/8 passed

87.50 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
shadow_reg_update_error				1	1	100.00
	kmac_shadow_reg_errors	1.730s	69.398us	1	1	100.00
shadow_reg_read_clear_staged_value				1	1	100.00
	kmac_shadow_reg_errors	1.730s	69.398us	1	1	100.00
shadow_reg_storage_error				1	1	100.00
	kmac_shadow_reg_errors	1.730s	69.398us	1	1	100.00
shadowed_reset_glitch				1	1	100.00
	kmac_shadow_reg_errors	1.730s	69.398us	1	1	100.00
shadow_reg_update_error_with_csr_rw				1	1	100.00
	kmac_shadow_reg_errors_with_csr_rw	4.830s	239.103us	1	1	100.00
tl_intg_err				2	2	100.00
	kmac_sec_cm	61.020s	14326.528us	1	1	100.00
	kmac_tl_intg_err	3.270s	108.008us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	kmac_tl_intg_err	3.270s	108.008us	1	1	100.00
sec_cm_lc_escalate_en_intersig_mubi				1	1	100.00
	kmac_lc_escalation	1.570s	58.323us	1	1	100.00
sec_cm_sw_key_key_masking				1	1	100.00
	kmac_smoke	26.420s	989.925us	1	1	100.00
sec_cm_key_sideload				1	1	100.00
	kmac_sideload	158.630s	15403.875us	1	1	100.00
sec_cm_cfg_shadowed_config_shadow				1	1	100.00
	kmac_shadow_reg_errors	1.730s	69.398us	1	1	100.00
sec_cm_fsm_sparse				1	1	100.00
	kmac_sec_cm	61.020s	14326.528us	1	1	100.00
sec_cm_ctr_redun				1	1	100.00
	kmac_sec_cm	61.020s	14326.528us	1	1	100.00
sec_cm_packer_ctr_redun				1	1	100.00
	kmac_sec_cm	61.020s	14326.528us	1	1	100.00
sec_cm_cfg_shadowed_config_regwen				1	1	100.00
	kmac_smoke	26.420s	989.925us	1	1	100.00
sec_cm_fsm_global_esc				1	1	100.00
	kmac_lc_escalation	1.570s	58.323us	1	1	100.00
sec_cm_fsm_local_esc				1	1	100.00
	kmac_sec_cm	61.020s	14326.528us	1	1	100.00
sec_cm_absorbed_ctrl_mubi				0	1	0.00
	kmac_mubi	1.100s	5.894us	0	1	0.00
sec_cm_sw_cmd_ctrl_sparse				1	1	100.00
	kmac_smoke	26.420s	989.925us	1	1	100.00

0/1 passed

0.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
stress_all_with_rand_reset				0	1	0.00
	kmac_stress_all_with_rand_reset	15.580s	499.038us	0	1	0.00

Error Messages

	Test	seed	line	log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [] vs []) Mismatch between unmasked_digest[] and dpi_digest[*]				6 test runs
	kmac_sideload_invalid	41737772602896068792794768802549893376562391941541095766243357615067470364374	76	UVM_INFO @ 59770679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_app	55388246110731981712223155120930910039637126677647799147997668581707378431530	78	UVM_INFO @ 310301961 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_app_with_partial_data	105008343923439341135228951865761370767640277967583894947582559859917701212937	78	UVM_INFO @ 206083486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_entropy_refresh	50632061612145964513869901986605015270995733893800158301179772158890509218656	79	UVM_INFO @ 990056694 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_error	27852661446859680866679596094874141909308312144836458996286664090856934323779	96	UVM_INFO @ 2531238024 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_entropy_ready_error	30452768632660598031893792666808881781791001333860700161434601010579428790646	77	UVM_INFO @ 21827081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err)				2 test runs
	kmac_mubi	107916192308200050114767616931706572553494070317962076542763993517569118798028	77	UVM_INFO @ 5894414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_stress_all_with_rand_reset	99513522569091059598623756095603951744897036342246511478353593672918515976326	142	UVM_INFO @ 499038403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))'				1 test run
	kmac_key_error	35490093823838725275538933184883313449923208512210958613898218813914129285741	78	UVM_ERROR @ 134541699 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A UVM_INFO @ 134541699 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---