| V1 |
|
100.00% |
| V2 |
|
68.97% |
| V2S |
|
75.00% |
| V3 |
|
100.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| kmac_smoke | 23.740s | 15337.111us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| kmac_csr_hw_reset | 0.940s | 29.184us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| kmac_csr_rw | 0.920s | 26.946us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| kmac_csr_bit_bash | 8.250s | 1775.058us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| kmac_csr_aliasing | 7.480s | 483.139us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| kmac_csr_mem_rw_with_rand_reset | 1.500s | 97.723us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| kmac_csr_rw | 0.920s | 26.946us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 7.480s | 483.139us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| kmac_mem_walk | 0.730s | 42.429us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| kmac_mem_partial_access | 1.150s | 74.495us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| long_msg_and_output | 1 | 1 | 100.00 | |||
| kmac_long_msg_and_output | 510.940s | 28338.053us | 1 | 1 | 100.00 | |
| burst_write | 1 | 1 | 100.00 | |||
| kmac_burst_write | 727.670s | 25170.081us | 1 | 1 | 100.00 | |
| test_vectors | 8 | 8 | 100.00 | |||
| kmac_test_vectors_sha3_224 | 28.310s | 1386.143us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_256 | 2450.810s | 437508.138us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_384 | 20.560s | 3745.686us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_512 | 15.630s | 1441.541us | 1 | 1 | 100.00 | |
| kmac_test_vectors_shake_128 | 2997.860s | 549136.355us | 1 | 1 | 100.00 | |
| kmac_test_vectors_shake_256 | 120.100s | 17026.831us | 1 | 1 | 100.00 | |
| kmac_test_vectors_kmac | 2.370s | 102.072us | 1 | 1 | 100.00 | |
| kmac_test_vectors_kmac_xof | 2.100s | 39.154us | 1 | 1 | 100.00 | |
| sideload | 1 | 1 | 100.00 | |||
| kmac_sideload | 148.010s | 3215.325us | 1 | 1 | 100.00 | |
| app | 0 | 1 | 0.00 | |||
| kmac_app | 3.900s | 133.594us | 0 | 1 | 0.00 | |
| app_with_partial_data | 0 | 1 | 0.00 | |||
| kmac_app_with_partial_data | 4.230s | 1039.650us | 0 | 1 | 0.00 | |
| entropy_refresh | 0 | 1 | 0.00 | |||
| kmac_entropy_refresh | 3.310s | 1272.108us | 0 | 1 | 0.00 | |
| error | 0 | 1 | 0.00 | |||
| kmac_error | 40.610s | 2458.572us | 0 | 1 | 0.00 | |
| key_error | 0 | 1 | 0.00 | |||
| kmac_key_error | 1.120s | 65.935us | 0 | 1 | 0.00 | |
| sideload_invalid | 0 | 1 | 0.00 | |||
| kmac_sideload_invalid | 1.110s | 14.858us | 0 | 1 | 0.00 | |
| edn_timeout_error | 1 | 1 | 100.00 | |||
| kmac_edn_timeout_error | 0.950s | 34.937us | 1 | 1 | 100.00 | |
| entropy_mode_error | 1 | 1 | 100.00 | |||
| kmac_entropy_mode_error | 1.340s | 56.132us | 1 | 1 | 100.00 | |
| entropy_ready_error | 0 | 1 | 0.00 | |||
| kmac_entropy_ready_error | 1.340s | 233.768us | 0 | 1 | 0.00 | |
| lc_escalation | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 1.450s | 1110.708us | 0 | 1 | 0.00 | |
| stress_all | 0 | 1 | 0.00 | |||
| kmac_stress_all | 5.480s | 651.217us | 0 | 1 | 0.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| kmac_intr_test | 0.800s | 20.840us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| kmac_alert_test | 0.860s | 46.006us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 1.470s | 236.848us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 1.470s | 236.848us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 0.940s | 29.184us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 0.920s | 26.946us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 7.480s | 483.139us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 1.590s | 122.359us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 0.940s | 29.184us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 0.920s | 26.946us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 7.480s | 483.139us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 1.590s | 122.359us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.560s | 98.308us | 1 | 1 | 100.00 | |
| shadow_reg_read_clear_staged_value | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.560s | 98.308us | 1 | 1 | 100.00 | |
| shadow_reg_storage_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.560s | 98.308us | 1 | 1 | 100.00 | |
| shadowed_reset_glitch | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.560s | 98.308us | 1 | 1 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors_with_csr_rw | 2.470s | 121.504us | 1 | 1 | 100.00 | |
| tl_intg_err | 2 | 2 | 100.00 | |||
| kmac_sec_cm | 73.060s | 35677.891us | 1 | 1 | 100.00 | |
| kmac_tl_intg_err | 2.060s | 63.766us | 1 | 1 | 100.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| kmac_tl_intg_err | 2.060s | 63.766us | 1 | 1 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 1.450s | 1110.708us | 0 | 1 | 0.00 | |
| sec_cm_sw_key_key_masking | 1 | 1 | 100.00 | |||
| kmac_smoke | 23.740s | 15337.111us | 1 | 1 | 100.00 | |
| sec_cm_key_sideload | 1 | 1 | 100.00 | |||
| kmac_sideload | 148.010s | 3215.325us | 1 | 1 | 100.00 | |
| sec_cm_cfg_shadowed_config_shadow | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.560s | 98.308us | 1 | 1 | 100.00 | |
| sec_cm_fsm_sparse | 1 | 1 | 100.00 | |||
| kmac_sec_cm | 73.060s | 35677.891us | 1 | 1 | 100.00 | |
| sec_cm_ctr_redun | 1 | 1 | 100.00 | |||
| kmac_sec_cm | 73.060s | 35677.891us | 1 | 1 | 100.00 | |
| sec_cm_packer_ctr_redun | 1 | 1 | 100.00 | |||
| kmac_sec_cm | 73.060s | 35677.891us | 1 | 1 | 100.00 | |
| sec_cm_cfg_shadowed_config_regwen | 1 | 1 | 100.00 | |||
| kmac_smoke | 23.740s | 15337.111us | 1 | 1 | 100.00 | |
| sec_cm_fsm_global_esc | 0 | 1 | 0.00 | |||
| kmac_lc_escalation | 1.450s | 1110.708us | 0 | 1 | 0.00 | |
| sec_cm_fsm_local_esc | 1 | 1 | 100.00 | |||
| kmac_sec_cm | 73.060s | 35677.891us | 1 | 1 | 100.00 | |
| sec_cm_absorbed_ctrl_mubi | 0 | 1 | 0.00 | |||
| kmac_mubi | 2.600s | 563.478us | 0 | 1 | 0.00 | |
| sec_cm_sw_cmd_ctrl_sparse | 1 | 1 | 100.00 | |||
| kmac_smoke | 23.740s | 15337.111us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 1 | 1 | 100.00 | |||
| kmac_stress_all_with_rand_reset | 65.600s | 5505.819us | 1 | 1 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] | 8 test runs | |||
| kmac_sideload_invalid | 64054223896461769549633027550756448116335094440229913117819948672754463153939 | 76 |
UVM_INFO @ 14858304 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_app | 56719430800894619439413183271472656509217645210539795419021262161258349847071 | 78 |
UVM_INFO @ 133594343 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_app_with_partial_data | 115272456928166630317683270882357560329441164903202355247971497985842893269911 | 78 |
UVM_INFO @ 1039649852 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_entropy_refresh | 12700513416793167349619580763787210375578036858155222345386275393629017152717 | 78 |
UVM_INFO @ 1272108478 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_error | 4932058406036079398052318057145581377260814468440924601515643083808338081173 | 96 |
UVM_INFO @ 2458572018 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_entropy_ready_error | 46455345281718837968203236196822428005474210593724448277916643851822130422189 | 77 |
UVM_INFO @ 233768180 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_lc_escalation | 57250916872351278671110389111013457996165681956915066939645794187040558047835 | 80 |
UVM_INFO @ 1110707696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| kmac_stress_all | 100426790296856771187345944750567627624749349305646510890533230153932521187229 | 86 |
UVM_INFO @ 651217152 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) | 1 test run | |||
| kmac_mubi | 40352141656306028265431120952071204747581576310730730762167360954509506797660 | 78 |
UVM_INFO @ 563478378 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' | 1 test run | |||
| kmac_key_error | 18732059152064146606523079424135050527459497551558121203014621414781656581300 | 78 |
UVM_ERROR @ 65934616 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 65934616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|