Simulation Results: kmac/unmasked

 
20/07/2026 15:30:33 DVSim: v1.49.12 sha: 99fb7bd json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 78.72 %
  • code
  • 66.15 %
  • assert
  • 96.20 %
  • func
  • 73.82 %
  • line
  • 92.84 %
  • branch
  • 87.20 %
  • cond
  • 83.14 %
  • toggle
  • 27.43 %
  • FSM
  • 40.15 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 19.670s 1774.316us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.150s 41.111us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.090s 25.060us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 16.140s 1784.373us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 7.670s 2144.636us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.710s 29.999us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.090s 25.060us 1 1 100.00
kmac_csr_aliasing 7.670s 2144.636us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.710s 14.611us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.290s 42.768us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 3625.040s 1269729.129us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 428.650s 35317.066us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 35.050s 3290.679us 1 1 100.00
kmac_test_vectors_sha3_256 2030.750s 195476.126us 1 1 100.00
kmac_test_vectors_sha3_384 17.980s 2307.535us 1 1 100.00
kmac_test_vectors_sha3_512 926.400s 634426.459us 1 1 100.00
kmac_test_vectors_shake_128 156.790s 67279.849us 1 1 100.00
kmac_test_vectors_shake_256 215.090s 7650.858us 1 1 100.00
kmac_test_vectors_kmac 2.640s 220.883us 1 1 100.00
kmac_test_vectors_kmac_xof 1.620s 37.375us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 359.410s 26391.906us 1 1 100.00
app 0 1 0.00
kmac_app 5.250s 205.613us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 1.640s 170.968us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 3.840s 518.934us 0 1 0.00
error 0 1 0.00
kmac_error 23.360s 6321.361us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.230s 112.470us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.770s 11.914us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 6.220s 1718.229us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 26.340s 1993.717us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 1.260s 56.557us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.220s 63.814us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 1.490s 79.082us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 1.090s 11.165us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.790s 161.039us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 1.480s 58.296us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 1.480s 58.296us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.150s 41.111us 1 1 100.00
kmac_csr_rw 1.090s 25.060us 1 1 100.00
kmac_csr_aliasing 7.670s 2144.636us 1 1 100.00
kmac_same_csr_outstanding 1.490s 211.083us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.150s 41.111us 1 1 100.00
kmac_csr_rw 1.090s 25.060us 1 1 100.00
kmac_csr_aliasing 7.670s 2144.636us 1 1 100.00
kmac_same_csr_outstanding 1.490s 211.083us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.180s 36.408us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.180s 36.408us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.180s 36.408us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.180s 36.408us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.500s 146.544us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 61.770s 86962.574us 1 1 100.00
kmac_tl_intg_err 2.630s 148.657us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.630s 148.657us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.220s 63.814us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 19.670s 1774.316us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 359.410s 26391.906us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.180s 36.408us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 61.770s 86962.574us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 61.770s 86962.574us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 61.770s 86962.574us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 19.670s 1774.316us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.220s 63.814us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 61.770s 86962.574us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 0.850s 24.369us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 19.670s 1774.316us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 32.700s 7015.871us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 7 test runs
kmac_app 11091795379259309904782955521267972338409198581468339079252442130974454949308 80
UVM_INFO @ 205613421 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 40851058546897789286000035327915968508247056830514115173025951221570326232987 77
UVM_INFO @ 170968354 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 24893045582592808763480127232304999254843004641036788325592603069493256415504 78
UVM_INFO @ 518934456 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 83990431209380651699718286640524380142749044218171939465611643702775098765485 91
UVM_INFO @ 6321361009 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 51105333693189736774332391709188429754355082596642624565754001233521335296679 77
UVM_INFO @ 56556651 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 24176768687148283602170407498578056058951019218859957982285559076061560264751 80
UVM_INFO @ 79081988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 68108403911033739328874575094793281705265633413681741694625952840097110535461 148
UVM_INFO @ 7015870700 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 2 test runs
kmac_sideload_invalid 6379850911564818767462884487813394080304334060358134984185774359603362257417 79
UVM_ERROR @ 11914173 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 11914173 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_key_error 25861210885603887315676950564088533080035328135153811649816650463269993934744 78
UVM_ERROR @ 112469611 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 112469611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 1 test run
kmac_mubi 92460071231327645537642601150454647352951598676036947712822727768676721217501 77
UVM_INFO @ 24368929 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---