Simulation Results: gpio

 
21/07/2026 15:30:33 DVSim: v1.49.12 sha: 93c75a6 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 96.50 %
  • code
  • 92.67 %
  • assert
  • 96.84 %
  • func
  • 99.99 %
  • line
  • 98.93 %
  • branch
  • 99.01 %
  • cond
  • 97.55 %
  • toggle
  • 75.18 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 0.900s 60.247us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.010s 61.097us 1 1 100.00
gpio_smoke_en_cdc_prim 1.290s 38.327us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 0.790s 243.836us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.600s 12.366us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.580s 14.965us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 2.110s 83.198us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.920s 53.309us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 0.870s 31.093us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.580s 14.965us 1 1 100.00
gpio_csr_aliasing 0.920s 53.309us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 0.730s 48.717us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 0.800s 342.072us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.600s 22.921us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 0.910s 373.469us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 2.440s 193.456us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 1.640s 212.432us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 13.540s 829.250us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 1.540s 541.747us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 0.630s 24.262us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 1.960s 1494.743us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.780s 22.157us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.590s 15.852us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 2.050s 42.475us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 2.050s 42.475us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.580s 14.965us 1 1 100.00
gpio_same_csr_outstanding 0.720s 27.290us 1 1 100.00
gpio_csr_aliasing 0.920s 53.309us 1 1 100.00
gpio_csr_hw_reset 0.600s 12.366us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.580s 14.965us 1 1 100.00
gpio_same_csr_outstanding 0.720s 27.290us 1 1 100.00
gpio_csr_aliasing 0.920s 53.309us 1 1 100.00
gpio_csr_hw_reset 0.600s 12.366us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.190s 127.857us 1 1 100.00
gpio_sec_cm 0.910s 37.358us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.190s 127.857us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 0 1 0.00
gpio_rand_straps 0.650s 5.116us 0 1 0.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 5.020s 423.783us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 2 test runs
gpio_stress_all 2178352310344973061588675986180421549065826240528834163253682486529397158516 76
UVM_INFO @ 1494742985 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 52759938609669447071461111463537422024765521204271003042847302004133552013196 75
UVM_INFO @ 5115567 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [SEQDEFPRI] Sequence parent_sequence has illegal priority: -* 1 test run
gpio_stress_all_with_rand_reset 13090851046836999545180304568489175528813555877637087510710504327227990142572 81
UVM_INFO @ 423783214 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---