Simulation Results: kmac/masked

 
21/07/2026 15:30:33 DVSim: v1.49.12 sha: 93c75a6 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.62 %
  • code
  • 68.47 %
  • assert
  • 96.91 %
  • func
  • 76.49 %
  • line
  • 95.47 %
  • branch
  • 89.51 %
  • cond
  • 83.93 %
  • toggle
  • 29.14 %
  • FSM
  • 44.30 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 67.670s 9608.315us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.870s 27.819us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.800s 51.818us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 6.560s 1772.860us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 5.400s 288.302us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.740s 58.941us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.800s 51.818us 1 1 100.00
kmac_csr_aliasing 5.400s 288.302us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.750s 41.980us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.280s 44.571us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1244.860s 51222.464us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 668.120s 40814.797us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1699.990s 86338.862us 1 1 100.00
kmac_test_vectors_sha3_256 35.490s 11503.397us 1 1 100.00
kmac_test_vectors_sha3_384 24.950s 3733.832us 1 1 100.00
kmac_test_vectors_sha3_512 1088.730s 51437.979us 1 1 100.00
kmac_test_vectors_shake_128 197.860s 337182.303us 1 1 100.00
kmac_test_vectors_shake_256 85.420s 3792.582us 1 1 100.00
kmac_test_vectors_kmac 2.470s 1395.280us 1 1 100.00
kmac_test_vectors_kmac_xof 2.850s 136.990us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 438.190s 97955.170us 1 1 100.00
app 0 1 0.00
kmac_app 1.230s 162.303us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 0.910s 7.171us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 1.450s 597.337us 0 1 0.00
error 0 1 0.00
kmac_error 37.340s 2257.197us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.080s 111.330us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.910s 8.341us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 3.600s 528.142us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 0.850s 12.920us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 1.340s 65.144us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.400s 107.495us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 4.610s 209.688us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.820s 37.586us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.800s 22.574us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.570s 116.030us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.570s 116.030us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.870s 27.819us 1 1 100.00
kmac_csr_rw 0.800s 51.818us 1 1 100.00
kmac_csr_aliasing 5.400s 288.302us 1 1 100.00
kmac_same_csr_outstanding 1.620s 50.053us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.870s 27.819us 1 1 100.00
kmac_csr_rw 0.800s 51.818us 1 1 100.00
kmac_csr_aliasing 5.400s 288.302us 1 1 100.00
kmac_same_csr_outstanding 1.620s 50.053us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.100s 26.152us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.100s 26.152us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.100s 26.152us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.100s 26.152us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.680s 1661.281us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 46.300s 46664.279us 1 1 100.00
kmac_tl_intg_err 2.520s 540.775us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.520s 540.775us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.400s 107.495us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 67.670s 9608.315us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 438.190s 97955.170us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.100s 26.152us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 46.300s 46664.279us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 46.300s 46664.279us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 46.300s 46664.279us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 67.670s 9608.315us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.400s 107.495us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 46.300s 46664.279us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 0.960s 9.744us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 67.670s 9608.315us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 1.860s 186.986us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 8 test runs
kmac_sideload_invalid 17347426239492152563025367686314199311073647879062968429644033611773144173597 76
UVM_INFO @ 8341074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 6468350389353911882111616000971825476158879605179061801208620316172894449552 77
UVM_INFO @ 162303480 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 89200626857320621219582167360716193142272401264138970133684877150356083690733 77
UVM_INFO @ 7170819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 36636757720421900810118302487115175978025188986631211090229953897242962060769 77
UVM_INFO @ 597336788 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 65753031777575716262851112249513422494861972477326874601414199327492533220149 93
UVM_INFO @ 2257196950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 74778693513461702984334513464830692637007175138192849284690565347622774388255 77
UVM_INFO @ 65143877 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 61063190251217938967824147413168346964605976976480840963321231345984848887451 81
UVM_INFO @ 209687905 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 22979348034950792607385830451523797851300171430178492477304937635117815516886 94
UVM_INFO @ 186986452 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 1 test run
kmac_mubi 52183760569119049915062201986352496419365577681631352403494246158898531791343 77
UVM_INFO @ 9743612 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_key_error 108986133223704168080020717669689988579045263823475247065382422244465917182483 78
UVM_ERROR @ 111330153 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 111330153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---