Simulation Results: kmac/masked

 
22/07/2026 15:30:29 DVSim: v1.50.0 sha: a22166c json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.17 %
  • code
  • 67.93 %
  • assert
  • 96.77 %
  • func
  • 75.80 %
  • line
  • 95.49 %
  • branch
  • 89.38 %
  • cond
  • 85.27 %
  • toggle
  • 29.02 %
  • FSM
  • 40.51 %
Validation stages
V1
100.00%
V2
68.97%
V2S
75.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 14.330s 1912.486us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.260s 43.832us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.060s 170.312us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 6.530s 849.888us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 3.100s 290.282us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.860s 275.209us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.060s 170.312us 1 1 100.00
kmac_csr_aliasing 3.100s 290.282us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.830s 14.470us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.310s 42.857us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 2209.180s 30634.166us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 364.480s 45679.816us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 37.450s 11675.130us 1 1 100.00
kmac_test_vectors_sha3_256 35.870s 11656.074us 1 1 100.00
kmac_test_vectors_sha3_384 22.010s 6285.653us 1 1 100.00
kmac_test_vectors_sha3_512 16.120s 13990.106us 1 1 100.00
kmac_test_vectors_shake_128 212.910s 229232.292us 1 1 100.00
kmac_test_vectors_shake_256 2283.880s 371303.325us 1 1 100.00
kmac_test_vectors_kmac 2.200s 156.831us 1 1 100.00
kmac_test_vectors_kmac_xof 2.050s 41.406us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 315.860s 8568.437us 1 1 100.00
app 0 1 0.00
kmac_app 7.230s 320.445us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 4.970s 167.017us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 6.810s 135.239us 0 1 0.00
error 0 1 0.00
kmac_error 32.120s 7559.168us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 0.840s 10.402us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 1.010s 46.167us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 2.830s 112.921us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 0.950s 124.357us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.880s 5.491us 0 1 0.00
lc_escalation 0 1 0.00
kmac_lc_escalation 1.210s 14.667us 0 1 0.00
stress_all 0 1 0.00
kmac_stress_all 3.310s 768.525us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.800s 18.069us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.880s 12.197us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 3.120s 295.600us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 3.120s 295.600us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.260s 43.832us 1 1 100.00
kmac_csr_rw 1.060s 170.312us 1 1 100.00
kmac_csr_aliasing 3.100s 290.282us 1 1 100.00
kmac_same_csr_outstanding 2.140s 113.201us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.260s 43.832us 1 1 100.00
kmac_csr_rw 1.060s 170.312us 1 1 100.00
kmac_csr_aliasing 3.100s 290.282us 1 1 100.00
kmac_same_csr_outstanding 2.140s 113.201us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.250s 78.513us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.250s 78.513us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.250s 78.513us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.250s 78.513us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.330s 221.142us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 92.060s 20017.226us 1 1 100.00
kmac_tl_intg_err 4.650s 1149.219us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 4.650s 1149.219us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 0 1 0.00
kmac_lc_escalation 1.210s 14.667us 0 1 0.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 14.330s 1912.486us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 315.860s 8568.437us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.250s 78.513us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 92.060s 20017.226us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 92.060s 20017.226us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 92.060s 20017.226us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 14.330s 1912.486us 1 1 100.00
sec_cm_fsm_global_esc 0 1 0.00
kmac_lc_escalation 1.210s 14.667us 0 1 0.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 92.060s 20017.226us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 10.910s 616.290us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 14.330s 1912.486us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 1.890s 246.745us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 7 test runs
kmac_sideload_invalid 95195743928715031025670539098092157002132787431219364428716074564325446702016 76
UVM_INFO @ 46167012 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 88182778770116452940787278845961125365664544207781788535847246483763489751553 80
UVM_INFO @ 320444826 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 577403845870811329067373068705765632442391346992659745503218790859506987292 79
UVM_INFO @ 167017108 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 31044639655862197181042807251522864118469602857778787801573988017514944361260 79
UVM_INFO @ 135239480 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 52250146582460712843352717479021195326674177028343532199785479833963016897133 93
UVM_INFO @ 7559168047 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 43130869190821703824092526021342670777197704419122771087448126463516000390038 77
UVM_INFO @ 5490919 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_lc_escalation 76337345957168479968408006938282021244680889872806717236992746877037944311849 80
UVM_INFO @ 14666555 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 3 test runs
kmac_mubi 39051104282830162543865199145287194688770321907710821132144997113759869831794 83
UVM_INFO @ 616290414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 113638269082605759576590591222489831817129518706963318217792080784317045999056 81
UVM_INFO @ 768524662 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 77991210606538965998461226609777455083925154196204985894408538463279007741688 95
UVM_INFO @ 246744809 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_key_error 18777525390913062150595530163902610646628106318388624056789225899908328155348 78
UVM_ERROR @ 10402371 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 10402371 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---