Simulation Results

Simulation Results: kmac/unmasked

22/07/2026 15:30:29 DVSim: v1.50.0 sha: a22166c json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
79.71 %

code
66.46 %

assert
96.50 %

func
76.18 %

line
93.12 %

branch
87.97 %

cond
87.19 %

toggle
27.54 %

FSM
36.50 %

Validation stages

V1		100.00%
V2		68.97%
V2S		75.00%
V3		100.00%

8/8 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	kmac_smoke	30.900s	4012.312us	1	1	100.00
csr_hw_reset				1	1	100.00
	kmac_csr_hw_reset	0.950s	35.726us	1	1	100.00
csr_rw				1	1	100.00
	kmac_csr_rw	1.000s	74.745us	1	1	100.00
csr_bit_bash				1	1	100.00
	kmac_csr_bit_bash	8.780s	3394.314us	1	1	100.00
csr_aliasing				1	1	100.00
	kmac_csr_aliasing	2.930s	73.908us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	kmac_csr_mem_rw_with_rand_reset	1.870s	92.993us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	kmac_csr_rw	1.000s	74.745us	1	1	100.00
	kmac_csr_aliasing	2.930s	73.908us	1	1	100.00
mem_walk				1	1	100.00
	kmac_mem_walk	0.880s	14.223us	1	1	100.00
mem_partial_access				1	1	100.00
	kmac_mem_partial_access	1.260s	308.745us	1	1	100.00

20/29 passed

68.97 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
long_msg_and_output				1	1	100.00
	kmac_long_msg_and_output	3099.680s	469823.500us	1	1	100.00
burst_write				1	1	100.00
	kmac_burst_write	254.360s	12304.681us	1	1	100.00
test_vectors				8	8	100.00
	kmac_test_vectors_sha3_224	32.960s	5495.066us	1	1	100.00
	kmac_test_vectors_sha3_256	1328.610s	25958.418us	1	1	100.00
	kmac_test_vectors_sha3_384	19.820s	5070.688us	1	1	100.00
	kmac_test_vectors_sha3_512	14.450s	2867.706us	1	1	100.00
	kmac_test_vectors_shake_128	140.490s	19990.048us	1	1	100.00
	kmac_test_vectors_shake_256	107.020s	66768.555us	1	1	100.00
	kmac_test_vectors_kmac	3.000s	118.336us	1	1	100.00
	kmac_test_vectors_kmac_xof	1.930s	81.397us	1	1	100.00
sideload				1	1	100.00
	kmac_sideload	90.540s	12226.750us	1	1	100.00
app				0	1	0.00
	kmac_app	2.200s	518.845us	0	1	0.00
app_with_partial_data				0	1	0.00
	kmac_app_with_partial_data	0.860s	472.971us	0	1	0.00
entropy_refresh				0	1	0.00
	kmac_entropy_refresh	11.130s	3421.827us	0	1	0.00
error				0	1	0.00
	kmac_error	66.230s	1535.203us	0	1	0.00
key_error				0	1	0.00
	kmac_key_error	0.970s	48.962us	0	1	0.00
sideload_invalid				0	1	0.00
	kmac_sideload_invalid	0.830s	9.262us	0	1	0.00
edn_timeout_error				1	1	100.00
	kmac_edn_timeout_error	31.890s	2484.943us	1	1	100.00
entropy_mode_error				1	1	100.00
	kmac_entropy_mode_error	23.500s	4007.526us	1	1	100.00
entropy_ready_error				0	1	0.00
	kmac_entropy_ready_error	1.130s	68.161us	0	1	0.00
lc_escalation				0	1	0.00
	kmac_lc_escalation	1.020s	278.015us	0	1	0.00
stress_all				0	1	0.00
	kmac_stress_all	4.300s	1308.286us	0	1	0.00
intr_test				1	1	100.00
	kmac_intr_test	0.920s	104.393us	1	1	100.00
alert_test				1	1	100.00
	kmac_alert_test	0.910s	35.633us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	kmac_tl_errors	1.790s	109.320us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	kmac_tl_errors	1.790s	109.320us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	kmac_csr_hw_reset	0.950s	35.726us	1	1	100.00
	kmac_csr_rw	1.000s	74.745us	1	1	100.00
	kmac_csr_aliasing	2.930s	73.908us	1	1	100.00
	kmac_same_csr_outstanding	2.040s	146.845us	1	1	100.00
tl_d_partial_access				4	4	100.00
	kmac_csr_hw_reset	0.950s	35.726us	1	1	100.00
	kmac_csr_rw	1.000s	74.745us	1	1	100.00
	kmac_csr_aliasing	2.930s	73.908us	1	1	100.00
	kmac_same_csr_outstanding	2.040s	146.845us	1	1	100.00

V2S

6/8 passed

75.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
shadow_reg_update_error				1	1	100.00
	kmac_shadow_reg_errors	1.170s	307.148us	1	1	100.00
shadow_reg_read_clear_staged_value				1	1	100.00
	kmac_shadow_reg_errors	1.170s	307.148us	1	1	100.00
shadow_reg_storage_error				1	1	100.00
	kmac_shadow_reg_errors	1.170s	307.148us	1	1	100.00
shadowed_reset_glitch				1	1	100.00
	kmac_shadow_reg_errors	1.170s	307.148us	1	1	100.00
shadow_reg_update_error_with_csr_rw				1	1	100.00
	kmac_shadow_reg_errors_with_csr_rw	3.700s	881.035us	1	1	100.00
tl_intg_err				2	2	100.00
	kmac_sec_cm	54.710s	32743.798us	1	1	100.00
	kmac_tl_intg_err	2.100s	112.568us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	kmac_tl_intg_err	2.100s	112.568us	1	1	100.00
sec_cm_lc_escalate_en_intersig_mubi				0	1	0.00
	kmac_lc_escalation	1.020s	278.015us	0	1	0.00
sec_cm_sw_key_key_masking				1	1	100.00
	kmac_smoke	30.900s	4012.312us	1	1	100.00
sec_cm_key_sideload				1	1	100.00
	kmac_sideload	90.540s	12226.750us	1	1	100.00
sec_cm_cfg_shadowed_config_shadow				1	1	100.00
	kmac_shadow_reg_errors	1.170s	307.148us	1	1	100.00
sec_cm_fsm_sparse				1	1	100.00
	kmac_sec_cm	54.710s	32743.798us	1	1	100.00
sec_cm_ctr_redun				1	1	100.00
	kmac_sec_cm	54.710s	32743.798us	1	1	100.00
sec_cm_packer_ctr_redun				1	1	100.00
	kmac_sec_cm	54.710s	32743.798us	1	1	100.00
sec_cm_cfg_shadowed_config_regwen				1	1	100.00
	kmac_smoke	30.900s	4012.312us	1	1	100.00
sec_cm_fsm_global_esc				0	1	0.00
	kmac_lc_escalation	1.020s	278.015us	0	1	0.00
sec_cm_fsm_local_esc				1	1	100.00
	kmac_sec_cm	54.710s	32743.798us	1	1	100.00
sec_cm_absorbed_ctrl_mubi				0	1	0.00
	kmac_mubi	9.630s	1226.576us	0	1	0.00
sec_cm_sw_cmd_ctrl_sparse				1	1	100.00
	kmac_smoke	30.900s	4012.312us	1	1	100.00

1/1 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
stress_all_with_rand_reset				1	1	100.00
	kmac_stress_all_with_rand_reset	39.790s	4566.843us	1	1	100.00

Error Messages

	Test	seed	line	log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [] vs []) Mismatch between unmasked_digest[] and dpi_digest[*]				7 test runs
	kmac_sideload_invalid	42489068478150015173144478439847258725622241796383630677893734224941232399060	76	UVM_INFO @ 9262442 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_app	13362615463814050972674342510284012215069163316940401071430947440584608088519	78	UVM_INFO @ 518845254 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_app_with_partial_data	94408864712218602660030484274623619028273587133753938891024332580184196088743	77	UVM_INFO @ 472971242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_entropy_refresh	66938603187565339444549843050399951139140369360304946177026987251303414488306	83	UVM_INFO @ 3421826943 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_error	96653881366359220776160982276906943055867679334142372771951244622870361005856	122	UVM_INFO @ 1535203250 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_entropy_ready_error	46728754492096088575633720184326765441173512409329838671139192454689976759299	77	UVM_INFO @ 68160791 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_lc_escalation	53343732314807241167470157414620707874074533445085698031088662203945486171778	77	UVM_INFO @ 278015276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err)				2 test runs
	kmac_mubi	48455961720212625219144939207273864353708656106874246358370995100581593507662	81	UVM_INFO @ 1226575883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	kmac_stress_all	111906067714151539580638380692399309891220237809440238480264643484411707826105	82	UVM_INFO @ 1308286137 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))'				1 test run
	kmac_key_error	56143221428363504600439989345388862075211923871387966756953738216453549028587	78	UVM_ERROR @ 48962242 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A UVM_INFO @ 48962242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---