Simulation Results: entropy_src/rng_4bits

 
23/07/2026 15:30:33 DVSim: v1.50.0 sha: 40dffb6 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 75.78 %
  • code
  • 87.70 %
  • assert
  • 84.73 %
  • func
  • 54.91 %
  • block
  • 94.17 %
  • line
  • 96.86 %
  • branch
  • 86.14 %
  • toggle
  • 76.15 %
  • FSM
  • 91.67 %
Validation stages
V1
83.33%
V2
100.00%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 2.000s 25.594us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 2.000s 54.857us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 1.000s 50.073us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 4.000s 118.888us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 4.000s 599.615us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
entropy_src_csr_mem_rw_with_rand_reset 1.000s 45.648us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 1.000s 50.073us 1 1 100.00
entropy_src_csr_aliasing 4.000s 599.615us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 3 3 100.00
entropy_src_smoke 2.000s 25.594us 1 1 100.00
entropy_src_rng 194.000s 14104.865us 1 1 100.00
entropy_src_fw_ov 123.000s 14123.197us 1 1 100.00
firmware_mode 1 1 100.00
entropy_src_fw_ov 123.000s 14123.197us 1 1 100.00
rng_mode 1 1 100.00
entropy_src_rng 194.000s 14104.865us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 91.000s 13142.202us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 194.000s 14104.865us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 194.000s 14104.865us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 194.000s 14104.865us 1 1 100.00
entropy_src_intr 3.000s 50.399us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 194.000s 14104.865us 1 1 100.00
entropy_src_functional_alerts 4.000s 721.613us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 109.000s 14697.722us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 2.000s 44.231us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 2.000s 180.991us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 2.000s 275.428us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 2.000s 31.935us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 3.000s 242.650us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 3.000s 242.650us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 54.857us 1 1 100.00
entropy_src_csr_rw 1.000s 50.073us 1 1 100.00
entropy_src_csr_aliasing 4.000s 599.615us 1 1 100.00
entropy_src_same_csr_outstanding 2.000s 57.350us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 54.857us 1 1 100.00
entropy_src_csr_rw 1.000s 50.073us 1 1 100.00
entropy_src_csr_aliasing 4.000s 599.615us 1 1 100.00
entropy_src_same_csr_outstanding 2.000s 57.350us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 2.000s 171.253us 1 1 100.00
entropy_src_tl_intg_err 3.000s 193.719us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 194.000s 14104.865us 1 1 100.00
entropy_src_cfg_regwen 2.000s 24.827us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 194.000s 14104.865us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 194.000s 14104.865us 1 1 100.00
sec_cm_intersig_mubi 2 2 100.00
entropy_src_rng 194.000s 14104.865us 1 1 100.00
entropy_src_fw_ov 123.000s 14123.197us 1 1 100.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 44.231us 1 1 100.00
entropy_src_sec_cm 2.000s 171.253us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 44.231us 1 1 100.00
entropy_src_sec_cm 2.000s 171.253us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 194.000s 14104.865us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 44.231us 1 1 100.00
entropy_src_sec_cm 2.000s 171.253us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 44.231us 1 1 100.00
entropy_src_sec_cm 2.000s 171.253us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 2.000s 44.231us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 4.000s 721.613us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 3.000s 193.719us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 74.000s 13114.504us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
entropy_src_stress_all_with_rand_reset 2.000s 12.102us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror adaptp_lo_total_fails 1 test run
entropy_src_stress_all_with_rand_reset 98134440255265014425286780547410452611686734177571781032024062662717864952862 112
UVM_INFO @ 12101530 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror alert_fail_counts 1 test run
entropy_src_csr_mem_rw_with_rand_reset 252207691410395422505267940595449141790095466732531557438598470046716905436 113
UVM_INFO @ 45647561 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---