Simulation Results: gpio

 
23/07/2026 15:30:33 DVSim: v1.50.0 sha: 40dffb6 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 97.07 %
  • code
  • 92.81 %
  • assert
  • 98.42 %
  • func
  • 99.99 %
  • line
  • 98.93 %
  • branch
  • 99.01 %
  • cond
  • 98.13 %
  • toggle
  • 75.18 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 0.740s 21.232us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.040s 42.726us 1 1 100.00
gpio_smoke_en_cdc_prim 1.350s 117.572us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 0.810s 181.880us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.760s 31.653us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.720s 44.371us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 1.620s 174.108us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 1.040s 37.313us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 0.990s 59.995us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.720s 44.371us 1 1 100.00
gpio_csr_aliasing 1.040s 37.313us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 1.610s 350.335us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.200s 246.327us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.890s 97.027us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.040s 760.761us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 1.850s 126.047us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 2.370s 89.521us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 2.800s 556.764us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 3.330s 709.194us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 0.980s 18.788us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 79.490s 11151.435us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.670s 78.507us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.860s 21.870us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 2.010s 167.213us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 2.010s 167.213us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.720s 44.371us 1 1 100.00
gpio_same_csr_outstanding 0.710s 15.057us 1 1 100.00
gpio_csr_aliasing 1.040s 37.313us 1 1 100.00
gpio_csr_hw_reset 0.760s 31.653us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.720s 44.371us 1 1 100.00
gpio_same_csr_outstanding 0.710s 15.057us 1 1 100.00
gpio_csr_aliasing 1.040s 37.313us 1 1 100.00
gpio_csr_hw_reset 0.760s 31.653us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.000s 630.419us 1 1 100.00
gpio_sec_cm 0.840s 100.151us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.000s 630.419us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 0 1 0.00
gpio_rand_straps 0.850s 5.359us 0 1 0.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 0.710s 7.535us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 2 test runs
gpio_stress_all 12706497219002814281939863902254695814423449158078974560483184560665057186551 2545
UVM_INFO @ 11151434582 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 88775560768030085881466698427614420725101185182049970110828835591107238423402 75
UVM_INFO @ 5358907 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 29879930474023408378980600300755603577206878427070652486623102370281607042349 83
UVM_INFO @ 7535372 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---