Simulation Results: kmac/unmasked

 
27/07/2026 15:30:29 DVSim: v1.50.0 sha: f1870b5 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 78.42 %
  • code
  • 63.74 %
  • assert
  • 94.31 %
  • func
  • 77.21 %
  • line
  • 95.21 %
  • branch
  • 87.74 %
  • cond
  • 83.55 %
  • toggle
  • 21.54 %
  • FSM
  • 30.66 %
Validation stages
V1
100.00%
V2
72.41%
V2S
62.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 32.600s 29103.658us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.300s 225.784us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.930s 16.469us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 13.790s 6444.206us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 3.860s 875.691us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 2.140s 353.473us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.930s 16.469us 1 1 100.00
kmac_csr_aliasing 3.860s 875.691us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.670s 24.917us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.110s 105.468us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 792.670s 45271.922us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 425.380s 121006.238us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1396.730s 26211.000us 1 1 100.00
kmac_test_vectors_sha3_256 28.130s 51217.825us 1 1 100.00
kmac_test_vectors_sha3_384 1380.500s 171045.959us 1 1 100.00
kmac_test_vectors_sha3_512 13.040s 2636.950us 1 1 100.00
kmac_test_vectors_shake_128 1661.380s 261728.536us 1 1 100.00
kmac_test_vectors_shake_256 289.050s 114905.857us 1 1 100.00
kmac_test_vectors_kmac 1.850s 335.041us 1 1 100.00
kmac_test_vectors_kmac_xof 1.660s 520.446us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 271.830s 29572.512us 1 1 100.00
app 0 1 0.00
kmac_app 4.130s 955.066us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 0.830s 7.256us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 7.180s 3545.614us 0 1 0.00
error 0 1 0.00
kmac_error 19.070s 14907.622us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 0.930s 6.295us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 1.450s 184.047us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 17.260s 1114.277us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 30.470s 11332.691us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.870s 4.917us 0 1 0.00
lc_escalation 0 1 0.00
kmac_lc_escalation 1.330s 211.080us 0 1 0.00
stress_all 1 1 100.00
kmac_stress_all 85.820s 14669.869us 1 1 100.00
intr_test 1 1 100.00
kmac_intr_test 0.880s 59.477us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.720s 47.157us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.490s 189.276us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.490s 189.276us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.300s 225.784us 1 1 100.00
kmac_csr_rw 0.930s 16.469us 1 1 100.00
kmac_csr_aliasing 3.860s 875.691us 1 1 100.00
kmac_same_csr_outstanding 1.380s 238.281us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.300s 225.784us 1 1 100.00
kmac_csr_rw 0.930s 16.469us 1 1 100.00
kmac_csr_aliasing 3.860s 875.691us 1 1 100.00
kmac_same_csr_outstanding 1.380s 238.281us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.480s 58.609us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.480s 58.609us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.480s 58.609us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.480s 58.609us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 3.060s 375.908us 1 1 100.00
tl_intg_err 1 2 50.00
kmac_sec_cm 1.180s 34.508us 0 1 0.00
kmac_tl_intg_err 2.410s 194.450us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.410s 194.450us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 0 1 0.00
kmac_lc_escalation 1.330s 211.080us 0 1 0.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 32.600s 29103.658us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 271.830s 29572.512us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.480s 58.609us 1 1 100.00
sec_cm_fsm_sparse 0 1 0.00
kmac_sec_cm 1.180s 34.508us 0 1 0.00
sec_cm_ctr_redun 0 1 0.00
kmac_sec_cm 1.180s 34.508us 0 1 0.00
sec_cm_packer_ctr_redun 0 1 0.00
kmac_sec_cm 1.180s 34.508us 0 1 0.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 32.600s 29103.658us 1 1 100.00
sec_cm_fsm_global_esc 0 1 0.00
kmac_lc_escalation 1.330s 211.080us 0 1 0.00
sec_cm_fsm_local_esc 0 1 0.00
kmac_sec_cm 1.180s 34.508us 0 1 0.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 7.910s 546.062us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 32.600s 29103.658us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 11.460s 483.452us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1673) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 5 test runs
kmac_app 47748623581034112762698879545880403759056072571831195224970887915231613663672 79
UVM_INFO @ 955065982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 99156911747221190529718069810858676644576844359516050500402221295899767807534 81
UVM_INFO @ 3545613724 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 41612141739471253028695607421950935150673069849843331150228639482783392025870 86
UVM_INFO @ 14907622199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 73140955180349400659493722209113044077064391365582657424391369503045440753897 77
UVM_INFO @ 4917003 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 115150202788914609930113767962644028969217737360959127368081972845319934814416 128
UVM_INFO @ 483452401 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (kmac_scoreboard.sv:524) scoreboard [scoreboard] Saw request be handled for app * when that app was not selected. 3 test runs
kmac_app_with_partial_data 71344492151672176929087718515595541070007800824387293364506216223104319360994 77
UVM_INFO @ 7255576 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_mubi 67188492785023100784091203603206756150998158391812285224156789089011031953310 81
UVM_INFO @ 546061815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_key_error 63793556038486292155412449640545869229663224732735782369362858751681782558965 77
UVM_INFO @ 6294858 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [sequencer] Item_done() called with no outstanding requests. Each call to item_done() must be paired with a previous call to get_next_item(). 2 test runs
kmac_lc_escalation 91666668999961370678056623808706391383264836436664423124476032764920398512237 77
UVM_INFO @ 211079528 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_sec_cm 113912319747834492898323111862206665462319674525893108060828170114876144030547 80
UVM_INFO @ 34507770 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_sideload_invalid 76319933758160819613128083082511354800842187189353192557038674264234874452206 82
UVM_ERROR @ 184046602 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 184046602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---