Simulation Results: keymgr

 
28/07/2026 15:30:25 DVSim: v1.50.0 sha: c01a435 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 83.40 %
  • code
  • 94.51 %
  • assert
  • 97.49 %
  • func
  • 58.19 %
  • line
  • 98.64 %
  • branch
  • 97.72 %
  • cond
  • 94.12 %
  • toggle
  • 96.04 %
  • FSM
  • 86.05 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 1.330s 147.923us 1 1 100.00
random 1 1 100.00
keymgr_random 2.510s 263.134us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 0.840s 216.145us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.940s 107.074us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 10.500s 1735.892us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 3.250s 328.978us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.180s 230.237us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.940s 107.074us 1 1 100.00
keymgr_csr_aliasing 3.250s 328.978us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 2.190s 65.227us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 1.820s 92.416us 1 1 100.00
keymgr_sideload_kmac 1.460s 80.445us 1 1 100.00
keymgr_sideload_aes 1.860s 310.430us 1 1 100.00
keymgr_sideload_otbn 1.190s 96.426us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 1.700s 86.270us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 1.910s 688.754us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 2.400s 1033.466us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 2.570s 270.618us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 2.150s 391.216us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 1.130s 119.138us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 9.350s 1142.971us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.620s 17.585us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.670s 46.003us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 2.120s 559.255us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 2.120s 559.255us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 0.840s 216.145us 1 1 100.00
keymgr_csr_rw 0.940s 107.074us 1 1 100.00
keymgr_csr_aliasing 3.250s 328.978us 1 1 100.00
keymgr_same_csr_outstanding 1.200s 191.972us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 0.840s 216.145us 1 1 100.00
keymgr_csr_rw 0.940s 107.074us 1 1 100.00
keymgr_csr_aliasing 3.250s 328.978us 1 1 100.00
keymgr_same_csr_outstanding 1.200s 191.972us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 6.140s 941.639us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 6.140s 941.639us 1 1 100.00
keymgr_tl_intg_err 2.350s 1164.256us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 1.740s 403.291us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 1.740s 403.291us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 1.740s 403.291us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 1.740s 403.291us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 3.690s 959.963us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 6.140s 941.639us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 6.140s 941.639us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 2.350s 1164.256us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 1.740s 403.291us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 2.190s 65.227us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 2.510s 263.134us 1 1 100.00
keymgr_csr_rw 0.940s 107.074us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 2.510s 263.134us 1 1 100.00
keymgr_csr_rw 0.940s 107.074us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 2.510s 263.134us 1 1 100.00
keymgr_csr_rw 0.940s 107.074us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 1.910s 688.754us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.150s 391.216us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.150s 391.216us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 2.510s 263.134us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 1.430s 131.093us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 6.140s 941.639us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 6.140s 941.639us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 6.140s 941.639us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 1.910s 258.357us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 1.910s 688.754us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 6.140s 941.639us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 6.140s 941.639us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 6.140s 941.639us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.910s 258.357us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.910s 258.357us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 6.140s 941.639us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.910s 258.357us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 6.140s 941.639us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 1.910s 258.357us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 5.350s 1432.673us 1 1 100.00