Simulation Results: entropy_src/rng_4bits

 
29/07/2026 15:30:30 DVSim: v1.50.0 sha: 5af475c json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 72.10 %
  • code
  • 87.13 %
  • assert
  • 83.42 %
  • func
  • 45.74 %
  • block
  • 94.23 %
  • line
  • 96.91 %
  • branch
  • 86.25 %
  • toggle
  • 75.79 %
  • FSM
  • 89.58 %
Validation stages
V1
83.33%
V2
100.00%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 2.000s 24.076us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 2.000s 28.376us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 2.000s 27.835us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 7.000s 482.691us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 3.000s 266.915us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
entropy_src_csr_mem_rw_with_rand_reset 2.000s 16.663us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 2.000s 27.835us 1 1 100.00
entropy_src_csr_aliasing 3.000s 266.915us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 3 3 100.00
entropy_src_smoke 2.000s 24.076us 1 1 100.00
entropy_src_rng 54.000s 13128.363us 1 1 100.00
entropy_src_fw_ov 47.000s 14433.898us 1 1 100.00
firmware_mode 1 1 100.00
entropy_src_fw_ov 47.000s 14433.898us 1 1 100.00
rng_mode 1 1 100.00
entropy_src_rng 54.000s 13128.363us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 32.000s 13122.508us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 54.000s 13128.363us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 54.000s 13128.363us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 54.000s 13128.363us 1 1 100.00
entropy_src_intr 14.000s 3877.028us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 54.000s 13128.363us 1 1 100.00
entropy_src_functional_alerts 4.000s 1359.876us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 192.000s 13081.019us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 2.000s 43.600us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 2.000s 55.103us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 2.000s 112.014us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 1.000s 64.403us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 3.000s 69.248us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 3.000s 69.248us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 28.376us 1 1 100.00
entropy_src_csr_rw 2.000s 27.835us 1 1 100.00
entropy_src_csr_aliasing 3.000s 266.915us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 83.079us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 28.376us 1 1 100.00
entropy_src_csr_rw 2.000s 27.835us 1 1 100.00
entropy_src_csr_aliasing 3.000s 266.915us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 83.079us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 1.000s 182.200us 1 1 100.00
entropy_src_tl_intg_err 2.000s 64.057us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 54.000s 13128.363us 1 1 100.00
entropy_src_cfg_regwen 1.000s 15.036us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 54.000s 13128.363us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 54.000s 13128.363us 1 1 100.00
sec_cm_intersig_mubi 2 2 100.00
entropy_src_rng 54.000s 13128.363us 1 1 100.00
entropy_src_fw_ov 47.000s 14433.898us 1 1 100.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 43.600us 1 1 100.00
entropy_src_sec_cm 1.000s 182.200us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 43.600us 1 1 100.00
entropy_src_sec_cm 1.000s 182.200us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 54.000s 13128.363us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 43.600us 1 1 100.00
entropy_src_sec_cm 1.000s 182.200us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 43.600us 1 1 100.00
entropy_src_sec_cm 1.000s 182.200us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 2.000s 43.600us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 4.000s 1359.876us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 2.000s 64.057us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 120.000s 13068.766us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
entropy_src_stress_all_with_rand_reset 2.000s 22.161us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror adaptp_lo_total_fails 2 test runs
entropy_src_stress_all_with_rand_reset 14133519343706336990212987531475512884368260919697439480104306457006339120961 112
UVM_INFO @ 22160860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
entropy_src_csr_mem_rw_with_rand_reset 44025989710347300337393883274143606209992007246902127262010917252618393178683 113
UVM_INFO @ 16662596 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---