Simulation Results: keymgr

 
29/07/2026 15:30:30 DVSim: v1.50.0 sha: 5af475c json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.87 %
  • code
  • 94.72 %
  • assert
  • 97.72 %
  • func
  • 68.17 %
  • line
  • 98.72 %
  • branch
  • 97.81 %
  • cond
  • 93.96 %
  • toggle
  • 97.08 %
  • FSM
  • 86.05 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 1.790s 83.695us 1 1 100.00
random 1 1 100.00
keymgr_random 2.930s 290.772us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 0.860s 69.850us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.830s 40.616us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 8.940s 375.640us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 8.080s 732.160us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 0.940s 61.250us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.830s 40.616us 1 1 100.00
keymgr_csr_aliasing 8.080s 732.160us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 2.820s 63.967us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 2.410s 1612.102us 1 1 100.00
keymgr_sideload_kmac 1.830s 116.051us 1 1 100.00
keymgr_sideload_aes 1.950s 72.802us 1 1 100.00
keymgr_sideload_otbn 2.130s 197.236us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 2.090s 170.096us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 2.550s 183.412us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 1.970s 61.811us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 2.630s 391.649us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 3.240s 1978.920us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 1.280s 111.302us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 17.080s 1517.625us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.800s 19.415us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.730s 15.176us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 2.700s 149.197us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 2.700s 149.197us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 0.860s 69.850us 1 1 100.00
keymgr_csr_rw 0.830s 40.616us 1 1 100.00
keymgr_csr_aliasing 8.080s 732.160us 1 1 100.00
keymgr_same_csr_outstanding 2.250s 120.357us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 0.860s 69.850us 1 1 100.00
keymgr_csr_rw 0.830s 40.616us 1 1 100.00
keymgr_csr_aliasing 8.080s 732.160us 1 1 100.00
keymgr_same_csr_outstanding 2.250s 120.357us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 10.370s 729.907us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 10.370s 729.907us 1 1 100.00
keymgr_tl_intg_err 3.250s 104.310us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 2.640s 557.807us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 2.640s 557.807us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 2.640s 557.807us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 2.640s 557.807us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 8.520s 1090.904us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 10.370s 729.907us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 10.370s 729.907us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 3.250s 104.310us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 2.640s 557.807us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 2.820s 63.967us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 2.930s 290.772us 1 1 100.00
keymgr_csr_rw 0.830s 40.616us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 2.930s 290.772us 1 1 100.00
keymgr_csr_rw 0.830s 40.616us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 2.930s 290.772us 1 1 100.00
keymgr_csr_rw 0.830s 40.616us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 2.550s 183.412us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.240s 1978.920us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.240s 1978.920us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 2.930s 290.772us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 1.900s 101.466us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 10.370s 729.907us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 10.370s 729.907us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 10.370s 729.907us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 4.310s 833.181us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 2.550s 183.412us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 10.370s 729.907us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 10.370s 729.907us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 10.370s 729.907us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 4.310s 833.181us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 4.310s 833.181us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 10.370s 729.907us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 4.310s 833.181us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 10.370s 729.907us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 4.310s 833.181us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 6.250s 316.272us 1 1 100.00