Simulation Results: kmac/masked

 
29/07/2026 15:30:30 DVSim: v1.50.0 sha: 5af475c json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 78.80 %
  • code
  • 65.51 %
  • assert
  • 94.37 %
  • func
  • 76.52 %
  • line
  • 97.04 %
  • branch
  • 89.63 %
  • cond
  • 83.07 %
  • toggle
  • 23.02 %
  • FSM
  • 34.81 %
Validation stages
V1
100.00%
V2
68.97%
V2S
62.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 16.590s 4116.956us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.840s 19.862us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.980s 65.045us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 15.260s 7802.464us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 5.160s 1303.051us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.880s 305.280us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.980s 65.045us 1 1 100.00
kmac_csr_aliasing 5.160s 1303.051us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.800s 65.488us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.260s 44.761us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1776.950s 322761.546us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 439.710s 7027.897us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 2243.910s 96576.072us 1 1 100.00
kmac_test_vectors_sha3_256 2417.390s 383623.040us 1 1 100.00
kmac_test_vectors_sha3_384 21.510s 2039.350us 1 1 100.00
kmac_test_vectors_sha3_512 12.860s 1542.581us 1 1 100.00
kmac_test_vectors_shake_128 1928.880s 508739.737us 1 1 100.00
kmac_test_vectors_shake_256 117.670s 30745.224us 1 1 100.00
kmac_test_vectors_kmac 1.980s 62.235us 1 1 100.00
kmac_test_vectors_kmac_xof 2.490s 132.061us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 279.380s 97529.227us 1 1 100.00
app 0 1 0.00
kmac_app 0.730s 30.757us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 4.690s 104.414us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 1.010s 33.353us 0 1 0.00
error 0 1 0.00
kmac_error 10.010s 854.428us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 0.740s 17.982us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.850s 5.610us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 18.350s 1448.641us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 0.760s 71.923us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.760s 102.099us 0 1 0.00
lc_escalation 0 1 0.00
kmac_lc_escalation 1.190s 104.469us 0 1 0.00
stress_all 0 1 0.00
kmac_stress_all 0.750s 6.384us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.790s 17.023us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.750s 53.484us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.550s 1184.700us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.550s 1184.700us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.840s 19.862us 1 1 100.00
kmac_csr_rw 0.980s 65.045us 1 1 100.00
kmac_csr_aliasing 5.160s 1303.051us 1 1 100.00
kmac_same_csr_outstanding 1.300s 66.823us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.840s 19.862us 1 1 100.00
kmac_csr_rw 0.980s 65.045us 1 1 100.00
kmac_csr_aliasing 5.160s 1303.051us 1 1 100.00
kmac_same_csr_outstanding 1.300s 66.823us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.110s 125.629us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.110s 125.629us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.110s 125.629us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.110s 125.629us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 3.290s 208.178us 1 1 100.00
tl_intg_err 1 2 50.00
kmac_sec_cm 0.960s 29.196us 0 1 0.00
kmac_tl_intg_err 2.110s 189.002us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.110s 189.002us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 0 1 0.00
kmac_lc_escalation 1.190s 104.469us 0 1 0.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 16.590s 4116.956us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 279.380s 97529.227us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.110s 125.629us 1 1 100.00
sec_cm_fsm_sparse 0 1 0.00
kmac_sec_cm 0.960s 29.196us 0 1 0.00
sec_cm_ctr_redun 0 1 0.00
kmac_sec_cm 0.960s 29.196us 0 1 0.00
sec_cm_packer_ctr_redun 0 1 0.00
kmac_sec_cm 0.960s 29.196us 0 1 0.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 16.590s 4116.956us 1 1 100.00
sec_cm_fsm_global_esc 0 1 0.00
kmac_lc_escalation 1.190s 104.469us 0 1 0.00
sec_cm_fsm_local_esc 0 1 0.00
kmac_sec_cm 0.960s 29.196us 0 1 0.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 7.460s 348.868us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 16.590s 4116.956us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 18.990s 3958.654us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (kmac_scoreboard.sv:524) scoreboard [scoreboard] Saw request be handled for app * when that app was not selected. 5 test runs
kmac_app 106738536692426817629809096376937020331666592328023782045622994350351118027051 82
UVM_INFO @ 30757273 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 77482334540557847925890356752667007959862585656219558548242231021774204854788 83
UVM_INFO @ 854428119 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_key_error 49520180901454487295892740361770368480010649173031892615801959267090241782264 77
UVM_INFO @ 17982061 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 24508082471392474960489854948811929016524036769756133566817283270597528914746 79
UVM_INFO @ 6383507 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 45129724913369928354215258463682251014376680884092655051213955441198941785456 103
UVM_INFO @ 3958654052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:1673) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 3 test runs
kmac_sideload_invalid 88375550624564216409088131296742032076807570002797302872501501429541263735506 76
UVM_INFO @ 5609555 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 56742118740215699283455802524641680053878148501990494291649215349775042556754 84
UVM_INFO @ 104413959 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 55240108775606030764357267319455056206385156159022956615695741256873728381350 77
UVM_INFO @ 33353467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [sequencer] Item_done() called with no outstanding requests. Each call to item_done() must be paired with a previous call to get_next_item(). 2 test runs
kmac_lc_escalation 68335295035955340232586145242680771224384533532791008624955217325556896719476 80
UVM_INFO @ 104468666 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_sec_cm 74109862731139502469733050524009817023138782945397961825946659178625075451279 79
UVM_INFO @ 29195605 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (kmac_scoreboard.sv:601) scoreboard [scoreboard] Unexpected m_error value in the app response (*) 1 test run
kmac_mubi 25422517850720826678127255998237340236241993407478761130607070721097579354983 79
UVM_INFO @ 348867841 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_entropy_ready_error 15220522367619867540540703998272794781062978743222763767304980043510392109085 78
UVM_ERROR @ 102099422 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 102099422 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---