Simulation Results: kmac/unmasked

 
29/07/2026 15:30:30 DVSim: v1.50.0 sha: 5af475c json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 77.72 %
  • code
  • 63.65 %
  • assert
  • 94.45 %
  • func
  • 75.07 %
  • line
  • 95.24 %
  • branch
  • 87.66 %
  • cond
  • 83.36 %
  • toggle
  • 21.35 %
  • FSM
  • 30.66 %
Validation stages
V1
100.00%
V2
62.07%
V2S
62.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 25.530s 924.452us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.880s 53.467us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.020s 73.800us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 8.020s 3722.444us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 6.200s 445.135us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.840s 131.370us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.020s 73.800us 1 1 100.00
kmac_csr_aliasing 6.200s 445.135us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.690s 14.127us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.110s 23.151us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 2057.880s 189868.339us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 477.180s 100848.778us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1348.850s 216536.267us 1 1 100.00
kmac_test_vectors_sha3_256 30.210s 5965.924us 1 1 100.00
kmac_test_vectors_sha3_384 17.110s 585.087us 1 1 100.00
kmac_test_vectors_sha3_512 903.580s 61019.691us 1 1 100.00
kmac_test_vectors_shake_128 163.140s 163579.634us 1 1 100.00
kmac_test_vectors_shake_256 74.370s 4510.001us 1 1 100.00
kmac_test_vectors_kmac 2.310s 446.904us 1 1 100.00
kmac_test_vectors_kmac_xof 2.150s 1567.290us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 75.620s 6063.120us 1 1 100.00
app 0 1 0.00
kmac_app 0.790s 25.393us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 7.040s 337.792us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 0.820s 14.050us 0 1 0.00
error 0 1 0.00
kmac_error 136.430s 35176.590us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 0.800s 8.998us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.840s 29.577us 0 1 0.00
edn_timeout_error 0 1 0.00
kmac_edn_timeout_error 0.820s 9.618us 0 1 0.00
entropy_mode_error 0 1 0.00
kmac_entropy_mode_error 3.320s 70.277us 0 1 0.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.910s 4.885us 0 1 0.00
lc_escalation 0 1 0.00
kmac_lc_escalation 0.680s 7.643us 0 1 0.00
stress_all 0 1 0.00
kmac_stress_all 5.390s 751.111us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.750s 15.705us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.720s 29.975us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.160s 110.942us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.160s 110.942us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.880s 53.467us 1 1 100.00
kmac_csr_rw 1.020s 73.800us 1 1 100.00
kmac_csr_aliasing 6.200s 445.135us 1 1 100.00
kmac_same_csr_outstanding 1.370s 315.800us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.880s 53.467us 1 1 100.00
kmac_csr_rw 1.020s 73.800us 1 1 100.00
kmac_csr_aliasing 6.200s 445.135us 1 1 100.00
kmac_same_csr_outstanding 1.370s 315.800us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.840s 97.052us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.840s 97.052us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.840s 97.052us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.840s 97.052us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 3.810s 1275.474us 1 1 100.00
tl_intg_err 1 2 50.00
kmac_sec_cm 0.990s 104.473us 0 1 0.00
kmac_tl_intg_err 2.910s 872.710us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.910s 872.710us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 0 1 0.00
kmac_lc_escalation 0.680s 7.643us 0 1 0.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 25.530s 924.452us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 75.620s 6063.120us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.840s 97.052us 1 1 100.00
sec_cm_fsm_sparse 0 1 0.00
kmac_sec_cm 0.990s 104.473us 0 1 0.00
sec_cm_ctr_redun 0 1 0.00
kmac_sec_cm 0.990s 104.473us 0 1 0.00
sec_cm_packer_ctr_redun 0 1 0.00
kmac_sec_cm 0.990s 104.473us 0 1 0.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 25.530s 924.452us 1 1 100.00
sec_cm_fsm_global_esc 0 1 0.00
kmac_lc_escalation 0.680s 7.643us 0 1 0.00
sec_cm_fsm_local_esc 0 1 0.00
kmac_sec_cm 0.990s 104.473us 0 1 0.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 4.100s 1680.281us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 25.530s 924.452us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 14.250s 321.371us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (kmac_scoreboard.sv:524) scoreboard [scoreboard] Saw request be handled for app * when that app was not selected. 6 test runs
kmac_entropy_refresh 60046934768524042285643287578258753359350903246335833286642738073038426276177 82
UVM_INFO @ 14050494 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_mubi 54875010705586269221862115146837125670329707471631129303712355984454317566228 79
UVM_INFO @ 1680280522 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 88559467606113339584250307308363644696311020389966680915156461347353377570511 159
UVM_INFO @ 35176590201 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_key_error 67892101110748075060636034607615117325518361846601565619644228157432039383836 77
UVM_INFO @ 8998375 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_lc_escalation 58396302635624782002560297000459698803923972329674145620313306147591446266288 77
UVM_INFO @ 7643139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 95254005924982063123725673603607183915128071198587945364465468634182344763142 154
UVM_INFO @ 321371341 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:1673) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 5 test runs
kmac_sideload_invalid 75430951465539806667882778163849714689940938418783370352080961800230168237759 81
UVM_INFO @ 29576564 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 32339942458422104956944252970609278856547443773392148658935604083976691347223 77
UVM_INFO @ 25393325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 29919727963896539492669814801309494644996090234378397005933924597818523852979 81
UVM_INFO @ 337791520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 15828093954197518237825225646692670555338603738654470950221689986530233718375 77
UVM_INFO @ 4884900 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 7430576927112499460009626078998716900487821693553297492780920794996192668524 81
UVM_INFO @ 751110886 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 2 test runs
kmac_edn_timeout_error 12827140702161854055233512008811124401672964277526645601902220890261018178521 83
UVM_ERROR @ 9618048 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 9618048 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_mode_error 76216337316371697377705105851491716229566068077821963010787143159427350088128 80
UVM_ERROR @ 70276953 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 70276953 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL sequencer [sequencer] Item_done() called with no outstanding requests. Each call to item_done() must be paired with a previous call to get_next_item(). 1 test run
kmac_sec_cm 111131916782396626003075703902459290565044195390267199543167509820654262676084 79
UVM_INFO @ 104472932 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---