| V1 |
|
83.33% |
| V2 |
|
100.00% |
| V2S |
|
100.00% |
| V3 |
|
50.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| entropy_src_smoke | 2.000s | 24.742us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| entropy_src_csr_hw_reset | 1.000s | 32.327us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| entropy_src_csr_rw | 2.000s | 32.708us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| entropy_src_csr_bit_bash | 10.000s | 3460.679us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| entropy_src_csr_aliasing | 3.000s | 519.441us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 0 | 1 | 0.00 | |||
| entropy_src_csr_mem_rw_with_rand_reset | 1.000s | 21.318us | 0 | 1 | 0.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| entropy_src_csr_rw | 2.000s | 32.708us | 1 | 1 | 100.00 | |
| entropy_src_csr_aliasing | 3.000s | 519.441us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| firmware | 3 | 3 | 100.00 | |||
| entropy_src_smoke | 2.000s | 24.742us | 1 | 1 | 100.00 | |
| entropy_src_rng | 27.000s | 14170.330us | 1 | 1 | 100.00 | |
| entropy_src_fw_ov | 124.000s | 13107.563us | 1 | 1 | 100.00 | |
| firmware_mode | 1 | 1 | 100.00 | |||
| entropy_src_fw_ov | 124.000s | 13107.563us | 1 | 1 | 100.00 | |
| rng_mode | 1 | 1 | 100.00 | |||
| entropy_src_rng | 27.000s | 14170.330us | 1 | 1 | 100.00 | |
| rng_max_rate | 1 | 1 | 100.00 | |||
| entropy_src_rng_max_rate | 337.000s | 13087.370us | 1 | 1 | 100.00 | |
| health_checks | 1 | 1 | 100.00 | |||
| entropy_src_rng | 27.000s | 14170.330us | 1 | 1 | 100.00 | |
| conditioning | 1 | 1 | 100.00 | |||
| entropy_src_rng | 27.000s | 14170.330us | 1 | 1 | 100.00 | |
| interrupts | 2 | 2 | 100.00 | |||
| entropy_src_rng | 27.000s | 14170.330us | 1 | 1 | 100.00 | |
| entropy_src_intr | 13.000s | 850.218us | 1 | 1 | 100.00 | |
| alerts | 2 | 2 | 100.00 | |||
| entropy_src_rng | 27.000s | 14170.330us | 1 | 1 | 100.00 | |
| entropy_src_functional_alerts | 5.000s | 176.966us | 1 | 1 | 100.00 | |
| stress_all | 1 | 1 | 100.00 | |||
| entropy_src_stress_all | 198.000s | 14062.639us | 1 | 1 | 100.00 | |
| functional_errors | 1 | 1 | 100.00 | |||
| entropy_src_functional_errors | 1.000s | 112.375us | 1 | 1 | 100.00 | |
| firmware_ov_read_contiguous_data | 1 | 1 | 100.00 | |||
| entropy_src_fw_ov_contiguous | 3.000s | 182.980us | 1 | 1 | 100.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| entropy_src_intr_test | 2.000s | 70.617us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| entropy_src_alert_test | 1.000s | 57.874us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| entropy_src_tl_errors | 4.000s | 657.194us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| entropy_src_tl_errors | 4.000s | 657.194us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| entropy_src_csr_hw_reset | 1.000s | 32.327us | 1 | 1 | 100.00 | |
| entropy_src_csr_rw | 2.000s | 32.708us | 1 | 1 | 100.00 | |
| entropy_src_csr_aliasing | 3.000s | 519.441us | 1 | 1 | 100.00 | |
| entropy_src_same_csr_outstanding | 2.000s | 52.589us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| entropy_src_csr_hw_reset | 1.000s | 32.327us | 1 | 1 | 100.00 | |
| entropy_src_csr_rw | 2.000s | 32.708us | 1 | 1 | 100.00 | |
| entropy_src_csr_aliasing | 3.000s | 519.441us | 1 | 1 | 100.00 | |
| entropy_src_same_csr_outstanding | 2.000s | 52.589us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| tl_intg_err | 2 | 2 | 100.00 | |||
| entropy_src_sec_cm | 2.000s | 128.415us | 1 | 1 | 100.00 | |
| entropy_src_tl_intg_err | 3.000s | 311.055us | 1 | 1 | 100.00 | |
| sec_cm_config_regwen | 2 | 2 | 100.00 | |||
| entropy_src_rng | 27.000s | 14170.330us | 1 | 1 | 100.00 | |
| entropy_src_cfg_regwen | 2.000s | 22.746us | 1 | 1 | 100.00 | |
| sec_cm_config_mubi | 1 | 1 | 100.00 | |||
| entropy_src_rng | 27.000s | 14170.330us | 1 | 1 | 100.00 | |
| sec_cm_config_redun | 1 | 1 | 100.00 | |||
| entropy_src_rng | 27.000s | 14170.330us | 1 | 1 | 100.00 | |
| sec_cm_intersig_mubi | 2 | 2 | 100.00 | |||
| entropy_src_rng | 27.000s | 14170.330us | 1 | 1 | 100.00 | |
| entropy_src_fw_ov | 124.000s | 13107.563us | 1 | 1 | 100.00 | |
| sec_cm_main_sm_fsm_sparse | 2 | 2 | 100.00 | |||
| entropy_src_functional_errors | 1.000s | 112.375us | 1 | 1 | 100.00 | |
| entropy_src_sec_cm | 2.000s | 128.415us | 1 | 1 | 100.00 | |
| sec_cm_ack_sm_fsm_sparse | 2 | 2 | 100.00 | |||
| entropy_src_functional_errors | 1.000s | 112.375us | 1 | 1 | 100.00 | |
| entropy_src_sec_cm | 2.000s | 128.415us | 1 | 1 | 100.00 | |
| sec_cm_rng_bkgn_chk | 1 | 1 | 100.00 | |||
| entropy_src_rng | 27.000s | 14170.330us | 1 | 1 | 100.00 | |
| sec_cm_fifo_ctr_redun | 2 | 2 | 100.00 | |||
| entropy_src_functional_errors | 1.000s | 112.375us | 1 | 1 | 100.00 | |
| entropy_src_sec_cm | 2.000s | 128.415us | 1 | 1 | 100.00 | |
| sec_cm_ctr_redun | 2 | 2 | 100.00 | |||
| entropy_src_functional_errors | 1.000s | 112.375us | 1 | 1 | 100.00 | |
| entropy_src_sec_cm | 2.000s | 128.415us | 1 | 1 | 100.00 | |
| sec_cm_ctr_local_esc | 1 | 1 | 100.00 | |||
| entropy_src_functional_errors | 1.000s | 112.375us | 1 | 1 | 100.00 | |
| sec_cm_esfinal_rdata_bus_consistency | 1 | 1 | 100.00 | |||
| entropy_src_functional_alerts | 5.000s | 176.966us | 1 | 1 | 100.00 | |
| sec_cm_tile_link_bus_integrity | 1 | 1 | 100.00 | |||
| entropy_src_tl_intg_err | 3.000s | 311.055us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| external_health_tests | 1 | 1 | 100.00 | |||
| entropy_src_rng_with_xht_rsps | 42.000s | 14122.546us | 1 | 1 | 100.00 | |
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| entropy_src_stress_all_with_rand_reset | 12.000s | 1586.016us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_WARNING (uvm_reg_field.svh:1186) [RegModel] Trying to predict value of field 'observe_fifo_depth' while register 'entropy_src_reg_block.observe_fifo_depth' is being accessed | 1 test run | |||
| entropy_src_stress_all_with_rand_reset | 105049538957932672364039131195634100744164039657876595790246457881516806438844 | 170 |
UVM_FATAL @ 1586016255 ps: (entropy_src_scoreboard.sv:1601) [uvm_test_top.env.scoreboard] Check failed (ral.observe_fifo_depth.observe_fifo_depth.predict( ral.observe_fifo_depth.observe_fifo_depth.get_mirrored_value()-1, .kind(UVM_PREDICT_DIRECT)))
UVM_INFO @ 1586016255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror adaptp_hi_total_fails | 1 test run | |||
| entropy_src_csr_mem_rw_with_rand_reset | 114643206321288475668319155989387661881993952145825118246603688827829771326478 | 113 |
UVM_INFO @ 21317878 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|